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path: root/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
AgeCommit message (Expand)Author
2026-09-27drm/msm/a6xx: Send THINMEM config to GMU for A850Akhil P Oommen
2026-09-26drm/msm/a6xx: Add HFI support for CLX featureAkhil P Oommen
2026-05-29drm/msm/adreno: rename llc_mmio to cx_misc_mmioAlexander Koskovich
2026-05-29drm/msm/a6xx: Allow IFPC with perfcntr streamRob Clark
2026-05-29drm/msm/a6xx: Append SEL regs to dyn pwrup reglistRob Clark
2026-05-29drm/msm/a6xx: Increase pwrup_reglist sizeRob Clark
2026-05-29drm/msm/a8xx: Add perfcntr flush sequenceRob Clark
2026-05-29drm/msm/a6xx: Add yield & flush helperRob Clark
2026-03-31drm/msm/a8xx: Preemption support for A840Akhil P Oommen
2026-03-31drm/msm/a8xx: Fix the ticks used in submit tracesAkhil P Oommen
2025-12-19drm/msm: Fix a7xx per pipe register programmingAnna Maniscalco
2025-11-18drm/msm/adreno: Do CX GBIF config before GMU startAkhil P Oommen
2025-11-18drm/msm/a8xx: Add support for Adreno 840 GPUAkhil P Oommen
2025-11-18drm/msm/adreno: Support AQE engineAkhil P Oommen
2025-11-18drm/msm/adreno: Introduce A8x GPU SupportAkhil P Oommen
2025-11-18drm/msm/adreno: Move adreno_gpu_func to catalogueAkhil P Oommen
2025-09-08drm/msm/a6xx: Enable IFPC on Adreno X1-85Akhil P Oommen
2025-09-08drm/msm/adreno: Disable IFPC when sysprof is activeAkhil P Oommen
2025-09-08drm/msm/adreno: Add fenced regwrite supportAkhil P Oommen
2025-07-04drm/msm: Update register xmlRob Clark
2025-01-03drm/msm: adreno: add plumbing to generate bandwidth vote table for GMUNeil Armstrong
2024-10-03drm/msm/a6xx: Use posamble to reset counters on preemptionAntonino Maniscalco
2024-10-03drm/msm/a6xx: Implement preemption for a7xx targetsAntonino Maniscalco
2024-10-03drm/msm/a6xx: Add a pwrup_list field to a6xx_infoAntonino Maniscalco
2024-09-01drm/msm/a6xx: Store correct gmu_cgc_mode in struct a6xx_infoKonrad Dybcio
2024-09-01drm/msm/a6xx: Store primFifoThreshold in struct a6xx_infoKonrad Dybcio
2024-06-29drm/msm/adreno: Add support for X185 GPUAkhil P Oommen
2024-06-20drm/msm/adreno: Move CP_PROTECT settings to hw catalogRob Clark
2024-06-20drm/msm/adreno: Move hwcg table into a6xx specific infoRob Clark
2024-04-22drm/msm: Drop msm_read/writelKonrad Dybcio
2023-08-17drm/msm/a6xx: Move LLC accessors to the common headerKonrad Dybcio
2023-08-07drm/msm/a6xx: Fix misleading commentRob Clark
2023-06-18drm/msm/a6xx: Introduce GMU wrapper supportKonrad Dybcio
2023-06-18drm/msm/a6xx: Add a helper for software-resetting the GPUKonrad Dybcio
2023-06-18drm/msm/a6xx: Move a6xx_bus_clear_pending_transactions to a6xx_gpuKonrad Dybcio
2023-01-05drm/msm/a6xx: Avoid gx gbit halt during rpm suspendAkhil P Oommen
2022-07-06drm/msm: Avoid unclocked GMU register access in 6xx gpu_busyDouglas Anderson
2021-11-28drm/msm: Drop priv->lastctxRob Clark
2021-10-01drm/msm/a6xx: Track current ctx by seqnoRob Clark
2021-06-23drm/msm: Convert to use resource-managed OPP APIYangtao Li
2021-06-08drm/msm/a6xx: update/fix CP_PROTECT initializationJonathan Marek
2021-01-31drm/msm: Add speed-bin support to a618 gpuAkhil P Oommen
2020-11-29drm/msm/a6xx: Add support for using system cache on MMU500 based targetsJordan Crouse
2020-11-29drm/msm/a6xx: Add support for using system cache(LLC)Sharat Masetty
2020-09-15drm/msm: a6xx: Use WHERE_AM_I for eligible targetsJordan Crouse
2020-09-12drm/msm/a6xx: Add support for per-instance pagetablesJordan Crouse
2020-07-31drm: msm: a6xx: send opp instead of a frequencySharat Masetty
2020-01-02drm: msm: a6xx: Add support for A618Sharat Masetty
2019-05-24drm/msm/a6xx: Rename a6xx_gmu_probe to a6xx_gmu_initSean Paul
2019-04-19drm/msm/a6xx: Make GMU reset usefulJordan Crouse