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2025-11-15Merge tag 'x86-urgent-2025-11-15' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds
2025-11-15x86/hyperv: Rename guest crash shutdown functionMukesh Rathor
2025-11-15x86: mshyperv: Remove duplicate asm/msr.h headerJiapeng Chong
2025-11-15arch/x86: mshyperv: Trap on access for some synthetic MSRsRoman Kisel
2025-11-15arch: hyperv: Get/set SynIC synth.registers via paravisorRoman Kisel
2025-11-15arch/x86: mshyperv: Discover Confidential VMBus availabilityRoman Kisel
2025-11-15x86/hyperv: Don't use auto-eoi when Secure AVIC is availableTianyu Lan
2025-11-14x86/bugs: Get rid of the forward declarationsBorislav Petkov (AMD)
2025-11-14x86/microcode/AMD: Add Zen5 model 0x44, stepping 0x1 minrevBorislav Petkov (AMD)
2025-11-14x86/CPU/AMD: Add additional fixed RDSEED microcode revisionsMario Limonciello
2025-11-14syscore: Pass context data to callbacksThierry Reding
2025-11-12x86: Restrict KVM-induced symbol exports to KVM modules where obvious/possibleSean Christopherson
2025-11-12x86/mtrr: Drop unnecessary export of "mtrr_state"Sean Christopherson
2025-11-12x86/bugs: Drop unnecessary export of "x86_spec_ctrl_base"Sean Christopherson
2025-11-08Merge tag 'x86-urgent-2025-11-08' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds
2025-11-07x86/microcode/AMD: Add more known models to entry sign checkingMario Limonciello (AMD)
2025-11-05x86/mce/amd: Define threshold restart function for banksYazen Ghannam
2025-11-05x86/mce/amd: Remove redundant reset_block()Yazen Ghannam
2025-11-05x86/mce/amd: Support SMCA Corrected Error InterruptYazen Ghannam
2025-11-05x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systemsYazen Ghannam
2025-11-05x86/mce: Unify AMD DFR handler with MCA PollingYazen Ghannam
2025-11-05x86/mce: Unify AMD THR handler with MCA PollingYazen Ghannam
2025-11-05x86: uaccess: don't use runtime-const rewriting in modulesLinus Torvalds
2025-11-04x86/CPU/AMD: Add missing terminator for zen5_rdseed_microcodeMario Limonciello
2025-10-30x86/microcode: Mark early_parse_cmdline() as __initYu Peng
2025-10-30x86/microcode/AMD: Select which microcode patch to loadBorislav Petkov (AMD)
2025-10-30x86/CPU/AMD: Extend Zen6 model rangeBorislav Petkov (AMD)
2025-10-28x86/CPU/AMD: Add RDSEED fix for Zen5Gregory Price
2025-10-27x86/microcode/AMD: Limit Entrysign signature checking to known generationsBorislav Petkov (AMD)
2025-10-27Merge tag 'x86_urgent_for_v6.18_rc3' into x86/microcodeBorislav Petkov (AMD)
2025-10-24x86/bugs: Remove dead code which might prevent from buildingAndy Shevchenko
2025-10-24x86/tsx: Get the tsx= command line parameter with early_param()Petr Tesarik
2025-10-24x86/tsx: Make tsx_ctrl_state staticPetr Tesarik
2025-10-21x86/bugs: Qualify RETBLEED_INTEL_MSGDavid Kaplan
2025-10-21x86/microcode: Fix Entrysign revision check for Zen1/NaplesAndrew Cooper
2025-10-20x86,fs/resctrl: Fix NULL pointer dereference with events force-disabled in mb...Babu Moger
2025-10-17x86/cpufeatures: Add X86_FEATURE_X2AVIC_EXTNaveen N Rao
2025-10-16x86/sgx: Enable automatic SVN updates for SGX enclavesElena Reshetova
2025-10-16x86/sgx: Implement ENCLS[EUPDATESVN]Elena Reshetova
2025-10-16x86/cpufeatures: Add X86_FEATURE_SGX_EUPDATESVN feature flagElena Reshetova
2025-10-16x86/sgx: Introduce functions to count the sgx_(vepc_)open()Elena Reshetova
2025-10-15x86/CPU/AMD: Prevent reset reasons from being retained across rebootRong Zhang
2025-10-15x86/microcode/intel: Enable staging when availableChang S. Bae
2025-10-15x86/microcode/intel: Support mailbox transferChang S. Bae
2025-10-15x86/microcode/intel: Implement staging handlerChang S. Bae
2025-10-15x86/microcode/intel: Define staging state structChang S. Bae
2025-10-15x86/microcode/intel: Establish staging control logicChang S. Bae
2025-10-15x86/microcode: Introduce staging step to reduce late-loading timeChang S. Bae
2025-10-15x86/cpu/topology: Make primary thread mask available with SMP=nChang S. Bae
2025-10-13x86/resctrl: Fix miscount of bandwidth event when reactivating previously una...Babu Moger