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2026-09-28arm64: dts: broadcom: bcm2712: Add GPU IOMMU and IOMMU cache nodesDaniel Drake
Define the IOMMU and IOMMUC nodes for the Broadcom BCM2712 SoC found in the Raspberry Pi 5. Enable use of the IOMMU for the HVS device that handles memory allocations for the display block. Signed-off-by: Daniel Drake <dan@reactivated.net> Link: https://lore.kernel.org/r/20260927-bcm2712-iommu-submit-v7-6-dfa2b975cbc9@reactivated.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-09-28arm64: dts: broadcom: rpi-5: Add RP1 PWM nodeStanimir Varbanov
The RP1 chipset used on the Raspberry Pi 5 features an integrated PWM controller to drive the cooling fan. Add the corresponding DT node for this PWM controller. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Co-developed-by: Andrea della Porta <andrea.porta@suse.com> Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/ad9bc35d7c30f7925fed4c6621ed0f67c39c3f09.1790606188.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-09-04arm64: dts: broadcom: bcm2712-rpi-5-b: add spi0 interfaceGregor Herburger
The Raspberry Pi 5 routes the spi0 of the rp1 chip to the pin header. Add the rp1_spi0 node and its pinctrl nodes to the devicetree to make the spi interface available. Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Reviewed-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/20260904-bcm2712-spi-v2-1-6f8fdfb030bc@linutronix.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-09-04arm64: dts: broadcom: bcm2712: Add USB OTG portPeter Robinson
The Raspberry Pi 5 has a USB2 OTG port wired up to the Type-C that uses the same IP in earlier generations so wire this up so it can be used. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Cc: Florian Fainelli <florian.fainelli@broadcom.com> Cc: Dave Stevenson <dave.stevenson@raspberrypi.com> Link: https://lore.kernel.org/r/20260802145109.728793-4-pbrobinson@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-09-04arm64: dts: broadcom: bcm2712: Add thermal monitorPeter Robinson
The thermal sensors on the bcm2712 (rpi5) are the same infrastructure as on the bcm2711 (rpi4) so add those details so we can get thermal monitoring on the device as it can get quite hot. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Cc: Florian Fainelli <florian.fainelli@broadcom.com> Cc: Dave Stevenson <dave.stevenson@raspberrypi.com> Link: https://lore.kernel.org/r/20260802145109.728793-3-pbrobinson@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-09-04arm64: dts: broadcom: bcm2712: add arm PMUPeter Robinson
The bcm2712 SoC in the Raspberry Pi 5 has a standard arm performance management unit that aligns with the Cortex-A76 cores that are in the SoC so add the details in so it can be used. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Cc: Florian Fainelli <florian.fainelli@broadcom.com> Cc: Dave Stevenson <dave.stevenson@raspberrypi.com> Tested-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/20260802145109.728793-2-pbrobinson@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-09-03arm64: dts: broadcom: rp1: add spi controllerGregor Herburger
The rp1 processor found on the Raspberry Pi 5 has nine Synchronous Serial Interfaces. Add the relevant nodes to the devicetree. Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Link: https://lore.kernel.org/r/20260811-bcm2712-spi-v1-1-4c1708d354bb@linutronix.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-09-03arm64: dts: broadcom: bcm2712-d-rpi-5-b: add compatibleGregor Herburger
The bcm2712 found on the Raspberry Pi 5 is available in the d Stepping and in a c Stepping. There are two separate dts files. The bcm2712-rpi-5-b.dts for the c Stepping and the bcm2712-d-rpi-5-b.dts for the d Stepping. The d stepping does not set its own compatible/model string but uses "raspberrypi,5-model-b" through its include. These two steppings are not compatible. Booting with the wrong dtb file causes a crash at boot. Add a compatibles string "raspberrypi,5-model-b-d0" together with a "bcm2712-d0" string to allow us to distinguish between those two steppings. Fixes: 44839e2ac8ec ("arm64: dts: broadcom: Add DT for D-step version of BCM2712") Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Reviewed-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260810-bcm2712-d-stepping-compatible-v4-2-73f74479539c@linutronix.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-09-03arm64: dts: broadcom: bcm2712: adjust display statusPeter Robinson
Typically non critical IP in a SoC are disabled by default in the SoC .dtsi and enabled on board specific configs. There are usecases, such as some CM5 carrier boards, where display output may not be desired or connected. So disable them on the SoC .dtsi and enable them on the RPi5 board. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Cc: Florian Fainelli <florian.fainelli@broadcom.com> Cc: Dave Stevenson <dave.stevenson@raspberrypi.com> Cc: Andrea della Porta <andrea.porta@suse.com> Fixes: 25d77bdd7df2 ("arm64: dts: broadcom: Add display pipeline support to BCM2712") Link: https://lore.kernel.org/r/20260801165430.598302-1-pbrobinson@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-08-18Merge tag 'soc-dt-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull SoC devicetree updates from Arnd Bergmann: "There are two new mystery SoCs with very little public information about them so far, Qualcomm's Cortex-A78C based "Shikra" and Altera's Cortex-A720 based Agilex72 SOCFPGA. We have also gained support for a couple of SoCs from the 2023/2024 timeframe that have been in the making for a while: - The Apple platform gains support for M3 Pro, Max and Ultra SoC, following the basic M3 support from 7.2. - Samsung Exynos 1580 is a high-end mobile phone SoC from 2024 - Canaan K230 is a RISC-V based 64-bit AI SoC, based on the earlier K210 chip - Sophgo SG2000 is a mixed Arm/RISC-V chip that was already supported using the Arm core but is now also added for RISC-V along with several other variants of the cv18xx series In terms of newly added machines we have reference platforms for all the chips above, plus - Only four 32-bit Arm boards: two older phones and two older industrial/embedded boards; using Allwinner, Qualcomm and Rockchip SoCs - Three laptops und three phones using Qualcomm SoCs - Ten 64-bit Rockchips based single-board computers, along with one NAS box and a game console. - Seven industrial/embedded boards and modules using NXP i.MX8/9 SoCs. - A Lenovo desktop box based on NVIDIA Jetson Xavier NX - A few more single-board computers based on Allwinnner A133, Spacemit K1 and TI AM62. As usual, there is a constant stream of minor cleanups and fixes towards addressing the 'dt-check-style --mode strict' warnings, and everyone is expected to address those warnings for new submissions now" * tag 'soc-dt-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (864 commits) Revert "riscv: dts: spacemit: k3: add i2s0-i2s5 nodes" Documentation/process: maintainer-soc: Mention expectation about dt-check-style ARM: dts: helios4: add SATA regulator supplies ARM: dts: helios4: add vcc-supply to GPIO expander ARM: dts: helios4: add vcc-supply to EEPROM arm64: dts: turris-mox: fix usb3 phys arm64: dts: ti: Correct white-space style arm64: dts: ti: k3-am64: Fix MDIO clock reference for ICSSG0 node arm64: dts: qcom: talos-evk: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: sa8155p-adp: Fix swapped USB and UFS QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: eliza-mtp: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: lemans: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: glymur: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: kaanapali: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: sar2130p: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: sm8750: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: sm8650: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: purwa: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: hamoa: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies arm64: dts: qcom: sc8180x: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies ...
2026-08-04arm64: dts: Correct white-space styleKrzysztof Kozlowski
Correct a few white-space issues, like missing space before bracket '{' character or spurious space, which will be flagged by dt-check-style ("redundant-whitespace" warning). No functional changes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Michal Simek <michal.simek@amd.com> # Versal NET Acked-by: Sven Peter <sven@kernel.org> # for apple dts Link: https://patch.msgid.link/20260801210210.383417-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-07-21arm64: dts: broadcom: bcm2712: Remove non-functional EL2 virtual timerDaniel Drake
Commit d87773de9efe1 ("clocksource/drivers/arm_arch_timer: Default to EL2 virtual timer when running VHE") causes boot to hang on Raspberry Pi 5. The newly-selected EL2 virtual timer does not generate any interrupts, even though the GIC_DIST_ENABLE_SET flag has been confirmed set via readback. It is highly unusual that this timer interrupt is non-operational because this is a standard GIC interrupt corresponding to a standard Cortex-A76 CPU timer. However, Broadcom have confirmed for this SoC: > the interrupt line was never connected in the first place as this was > not identified as being a requirement Remove the corresponding DeviceTree entry. Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Closes: https://lore.kernel.org/all/ea15cce1-b393-43f6-8d58-3d6f90f0c0cd@samsung.com/ Fixes: faa3381267d0 ("arm64: dts: broadcom: Add minimal support for Raspberry Pi 5") Signed-off-by: Daniel Drake <dan@reactivated.net> Link: https://lore.kernel.org/r/20260716-bcm2712-el2-v2-1-e708f7fb42fa@reactivated.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20arm64: dts: broadcom: bcm2712: Move non simple-bus nodes to root levelRob Herring (Arm)
The 'gpu' and 'firmware' nodes are not MMIO devices, so they should not be under a 'simple-bus', but at the root level. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260320154809.1246064-2-robh@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16arm64: dts: broadcom: bcm2712-d-rpi-5-b: update uart10 interruptGregor Herburger
On the -d revision of bcm2712 the uart interrupt is on 120. Update it accordingly. Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Link: https://lore.kernel.org/r/20260226-raspi-dts-updates-v1-6-60832d20ff04@linutronix.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16arm64: dts: broadcom: bcm2712-d-rpi-5-b: add fixes for pinctrl/pinctrl_aonGregor Herburger
On the -d revision of the bcm2712 the pinctrl differs from the c0 revision. The driver already supports both and distinguishes the two with the compatible string. Update the compatible string and reg length to reflect the different pinctrl. Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Link: https://lore.kernel.org/r/20260226-raspi-dts-updates-v1-5-60832d20ff04@linutronix.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16arm64: dts: broadcom: bcm2712-rpi-5-b: add pinctrl properties for csi i2csGregor Herburger
Configure the i2c pins for the csi interfaces as i2c. Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Link: https://lore.kernel.org/r/20260226-raspi-dts-updates-v1-4-60832d20ff04@linutronix.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16arm64: dts: broadcom: bcm2712: add camera backend node pispbeGregor Herburger
The bcm2712 found in the Raspberry Pi 5 has a PiSP Image Signal Processor back end image processor. Add the relevant node to the devicetree. Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Link: https://lore.kernel.org/r/20260226-raspi-dts-updates-v1-3-60832d20ff04@linutronix.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16arm64: dts: broadcom: rp1: add csi nodesGregor Herburger
The RaspberryPi 5 has 2 PiSP Camera front end controller on the RP1 chipset. Add the relevant nodes to the devicetree. Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Link: https://lore.kernel.org/r/20260226-raspi-dts-updates-v1-2-60832d20ff04@linutronix.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16arm64: dts: broadcom: rp1: add i2c controllerGregor Herburger
The RaspberryPi 5 has 7 designware-i2c I2C controller on the RP1 chipset. Add the relevant nodes to the devicetree. Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Link: https://lore.kernel.org/r/20260226-raspi-dts-updates-v1-1-60832d20ff04@linutronix.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16arm64: dts: broadcom: bcm2712: Add V3D device nodeMaíra Canal
Commits 0ad5bc1ce463 ("drm/v3d: fix up register addresses for V3D 7.x") and 6fd9487147c4 ("drm/v3d: add brcm,2712-v3d as a compatible V3D device") added driver support for V3D on BCM2712, but the corresponding device tree node is still missing. Add the V3D device tree node to the BCM2712 DTS. Signed-off-by: Maíra Canal <mcanal@igalia.com> Reviewed-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20260114120610.82531-1-mcanal@igalia.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-02-10Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull SoC devicetree updates from Arnd Bergmann: "There are a handful of new SoCs this time, all of these are more or less related to chips in a wider family: - SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first widely available RVA23 implementation. Note that this is entirely unrelated with the similarly named Texas Instruments K3 chip family that follwed the TI Keystone2 SoC. - The Realtek Kent family of SoCs contains three chip models rtd1501s, rtd1861b and rtd1920s, and is related to their earlier Set-top-box and NAS products such as rtd1619, but is built on newer Arm Cortex-A78 cores. - The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635) mobile phone SoC built around Armv9 Kryo cores of the Arm Cortex-A720 generation. This one is used in the Fairphone Gen 6 - Qualcomm Kaanapali is a new SoC based around eight high performance Oryon CPU cores - NXP i.MX8QP and i.MX952 are both feature reduced versions of chips we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU cores and I/O interfaces. As part of a cleanup, a number of SoC specific devicetree files got removed because they did not have a single board using the .dtsi files and they were never compile tested as a result: Samsung s3c6400, ST spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/ r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI am3703/am3715. All of these could be restored easily if a new board gets merged. Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only machine, as all remaining users are assumed to be using ACPI based firmware. A relatively small number of 43 boards get added this time, and almost all of them for arm64. Aside from the reference boards for the newly added SoCs, this includes: - Three server boards use 32-bit ASpeed BMCs - One more reference board for 32-bit Microchip LAN9668 - 64-bit Arm single-board computers based on Amlogic s905y4, CIX sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm qcs6490/qrb2210 and Rockchip rk3568/rk3588s - Carrier board for SOMs using Intel agilex5, Marvell Armada 7020, NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588 - Two mobile phones using Snapdragon 845 - A gaming device and a NAS box, both based on Rockchips rk356x On top of the newly added boards and SoCs, there is a lot of background activity going into cleanups, in particular towards getting a warning-free dtc build, and the usual work on adding support for more hardware on the previously added machines" * tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (757 commits) dt-bindings: intel: Add Agilex eMMC support arm64: dts: socfpga: agilex: add emmc support arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node ARM: dts: socfpga: fix dtbs_check warning for fpga-region ARM: dts: socfpga: add #address-cells and #size-cells for sram node dt-bindings: altera: document syscon as fallback for sys-mgr arm64: dts: altera: Use lowercase hex dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes arm64: dts: socfpga: agilex5: add support for modular board dt-bindings: intel: Add Agilex5 SoCFPGA modular board arm64: dts: socfpga: agilex5: Add dma-coherent property arm64: dts: realtek: Add Kent SoC and EVB device trees dt-bindings: arm: realtek: Add Kent Soc family compatibles ARM: dts: samsung: Drop s3c6400.dtsi ARM: dts: nuvoton: Minor whitespace cleanup MAINTAINERS: Add Falcon DB arm64: dts: a7k: add COM Express boards ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi arm64: dts: rockchip: Fix rk3588 PCIe range mappings ...
2026-01-16arm64: dts: broadcom: bcm4906-netgear-r8000p: Drop unnecessary "ranges" in ↵Rob Herring (Arm)
partition node "ranges" is only valid for MMIO addresses as it is used for translating addresses to CPU address. Even if a partial translation was supported, the DT is incorrect here as the nvmem-layout node would also need "ranges". So drop "ranges" and the associated cell size properties. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260108231558.1422454-2-robh@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: northstar2: Drop "arm,cci-400-pmu" fallback compatibleRob Herring (Arm)
The "arm,cci-400-pmu" compatible is not documented as a valid fallback nor is it used, so drop it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-13-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: northstar2: Drop QSPI "clock-names"Rob Herring (Arm)
The "clock-names" property is not documented for the "brcm,spi-bcm-qspi" binding nor in use by the kernel driver, so drop it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-12-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: northstar2: Drop unused and undocumented ↵Rob Herring (Arm)
"brcm,pcie-ob-oarr-size" properties The "brcm,pcie-ob-oarr-size" property is unused and undocumented, so drop them. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-11-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: northstar2: Rework clock nodesRob Herring (Arm)
The nd2-clocks.dtsi is oddly included in the middle of a bus node and is only included in one place, so collapse it into ns2.dtsi. Move the fixed and fixed-factor clock nodes to the root as they are not part of the bus. Rename the node names to use preferred names. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-10-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: ns2-svk: Use non-deprecated at25 propertiesRob Herring (Arm)
The at25,* properties have been deprecated since 2012. This board wasn't upstream until 2014, so it should be safe to switch over to the "new" properties. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-9-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: Use preferred node namesRob Herring (Arm)
Update various node names to use the documented preferred names. Node names/path aren't considered ABI, so changing them should be safe. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-8-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: stingray: Move raid nodes out of busRob Herring (Arm)
The 'raid' nodes are not MMIO devices and are not part of a bus, so move them to the root level. Drop the unit-addresses as they don't have any address. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-7-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: stingray: Fix 'simple-bus' node namesRob Herring (Arm)
Fix 'simple-bus' node names to follow the defined pattern. Nodes with 'reg' or 'ranges' addresses should also have a unit-address. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-6-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: stingray: Rework clock nodesRob Herring (Arm)
The stringray-clocks.dtsi is oddly included in the middle of a bus node and is only included in one place, so collapse it into stingray.dtsi. Move the fixed and fixed-factor clock nodes to the root as they are not part of the bus. Rename the node names to use preferred names. Drop the unnecessary 1:1 fixed-factor clock providers. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-5-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-16arm64: dts: broadcom: Remove unused and undocumented nodesRob Herring (Arm)
The "silabs,si3226x" and "brcm,bdc-v0.16" nodes have no documentation and no driver in the kernel, so remove them. They can be added back with proper documentation if there is a need for them. Note that if both USB ports have similar memory maps in relationship to their USB PHY nodes, it looks like the device controller should have been at 0x12000, not 0x21000? Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-4-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-08arm64: dts: broadcom: bcm2712: Add watchdog DT nodeStanimir Varbanov
Add watchdog device-tree node for bcm2712 SoC. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Link: https://lore.kernel.org/r/20251031183309.1163384-5-svarbanov@suse.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-08arm64: dts: broadcom: bcm2712: Enable RNGPeter Robinson
The RNG is the same IP as in the bcm2711 so add the device tree block to enable the device. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250927075643.716179-1-pbrobinson@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-12-19arm64: dts: broadcom: rp1: drop RP1 overlayAndrea della Porta
RP1 support loaded from overlay has been dropped from the driver and the DTB intended to be loaded with the overlay no longer exists. Drop unused include file and overlay. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/85167b815d41ed9ed690ad239a19de5cd2e8be1c.1766077285.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-12-19arm64: dts: broadcom: bcm2712: fix RP1 endpoint PCI topologyAndrea della Porta
The node describing the RP1 endpoint currently uses a specific name ('rp1_nexus') that does not correctly reflect the PCI topology. Update the DT with the correct topology and use generic node names. Additionally, since the driver dropped overlay support in favor of a fully described DT, rename '...-ovl-rp1.dts' to '...-base.dtsi' for inclusion in the board DTB, as it is no longer compiled as a standalone DTB. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/827b12ba48bb47bc77a0f5e5617aea961c8bc6b5.1766077285.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-11-05arm64: dts: broadcom: bcm2712: rpi-5: Add ethernet0 aliasLaurent Pinchart
The RP1 ethernet controller DT node contains a local-mac-address property to pass the MAC address from the boot loader to the kernel. The boot loader does not fill the MAC address as the ethernet0 alias is missing. Add it. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/20251102111443.18206-1-laurent.pinchart@ideasonboard.com Fixes: 43456fdfc014 ("arm64: dts: broadcom: Enable RP1 ethernet for Raspberry Pi 5") Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-11-05arm64: dts: broadcom: Assign clock rates in eth node for RPi5Andrea della Porta
In Raspberry Pi 5 DTS, the Ethernet clock rates must be assigned as the default clock register values are not valid for the Ethernet interface to function. This can be done either in rp1_clocks node or in rp1_eth node. Define the rates in rp1_eth node, as those clocks are 'leaf' clocks used specifically by the Ethernet device only. Fixes: 43456fdfc014 ("arm64: dts: broadcom: Enable RP1 ethernet for Raspberry Pi 5") Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/20251021135533.5517-1-andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-10-13arm64: dts: broadcom: bcm2712: Define VGIC interruptPeter Robinson
Define the interrupt in the GICv2 for vGIC so KVM can be used, it was missed from the original upstream DTB for some reason. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Cc: Andrea della Porta <andrea.porta@suse.com> Cc: Phil Elwell <phil@raspberrypi.com> Fixes: faa3381267d0 ("arm64: dts: broadcom: Add minimal support for Raspberry Pi 5") Link: https://lore.kernel.org/r/20250924085612.1039247-1-pbrobinson@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-09arm64: dts: broadcom: Enable USB devicetree entries for Rpi5Andrea della Porta
RaspberryPi 5 presents two USB 2.0 and two USB 3.0 ports. Configure and enable the USB nodes in the devicetree. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/c6b17f0f896b5cdd790fc10aeb2b76b71df9b58d.1757065053.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-09arm64: dts: broadcom: rp1: Add USB nodesAndrea della Porta
The RaspberryPi 5 has RP1 chipset containing two USB host controller, while presenting two USB 2.0 and two USB 3.0 ports to the outside. Add the relevant USB nodes to the devicetree. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/16d753cb4bf37beb5e9c6f0e03576cf13708f27d.1757065053.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-04arm64: dts: broadcom: amend the comment about the role of BCM2712 board DTSAndrea della Porta
Current board DTS for Raspberry Pi5 states that bcm2712-rpi-5-b.dts should not be modified and all declarations should go in the overlay board DTS instead (bcm2712-rpi-5-b-ovl-rp1.dts). There's a caveat though: there's currently no infrastructure to reliably reference nodes that have not been declared yet, as is the case when loading those nodes from a runtime overlay. For more details about these limitations see [1] and follow-ups. Change the comment to make it clear which DTS file will host specific nodes, especially the RP1 related nodes which should be customized outside the overlay DTS. Link [1] - https://lore.kernel.org/all/CAMEGJJ3=W8_R0xBvm8r+Q7iExZx8xPBHEWWGAT9ngpGWDSKCaQ@mail.gmail.com/ Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/47f6368a77d6bd846c02942d20c07dd48e0ae7df.1754914766.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-04arm64: dts: broadcom: delete redundant pcie enablement nodesAndrea della Porta
The pcie1 and pcie2 override nodes to enable the respective peripherals are declared both in bcm2712-rpi-5-b.dts and bcm2712-rpi-5-b-ovl-rp1.dts, which makes those declared in the former file redundant. Drop those redundant nodes from the board devicetree. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/2865b787d893fd1dcf816e1c96856711754d612d.1754914766.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-04arm64: dts: broadcom: Enable RP1 ethernet for Raspberry Pi 5Stanimir Varbanov
Enable RP1 ethernet DT node for Raspberry Pi 5. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250822093440.53941-6-svarbanov@suse.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-04arm64: dts: rp1: Add ethernet DT nodeStanimir Varbanov
Add macb GEM ethernet DT node. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250822093440.53941-5-svarbanov@suse.de Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-04arm64: dts: broadcom: bcm2712: Add UARTA controller nodeIvan T. Ivanov
On RPi5 device Bluetooth chips is connected to UARTA port. Add Bluetooth chips and related pin definitions. With this and firmware already provided by distributions, at least on openSUSE Tumbleweed, this is sufficient to make Bluetooth operational on RPi5 \o/. Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/35c0da6a741019efefc3c8e405e210a3a8156830.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-04arm64: dts: broadcom: bcm2712: Add second SDHCI controller nodeIvan T. Ivanov
Add SDIO2 node. On RPi5 it is connected to WiFi chip. Add related pin, gpio and regulator definitions and add WiFi node. With this and firmware already provided by distributions, at least on openSUSE Tumbleweed, this is sufficient to make WiFi operational on RPi5 \o/. Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/4ff3a58e98d90a43deb2448b23754808afc7153b.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-04arm64: dts: broadcom: bcm2712: Add one more GPIO nodeIvan T. Ivanov
Add GPIO and related interrupt controller nodes and wire one of the lines to power button. Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/6d311b2f629bbc0e1dd9821e4aa8e5af9f8e5362.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-04arm64: dts: broadcom: bcm2712: Add pin controller nodesIvan T. Ivanov
Add pin-control devicetree nodes and used them to explicitly define uSD card interface pin configuration. Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Reviewed-by: Stefan Wahren <wahrenst@gmx.net> Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/5ceba8558e0007a9685f19b51d681d0ce79e7634.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-03arm64: dts: broadcom: bcm2712: Add default GIC address cellsKrzysztof Kozlowski
Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: bcm2712.dtsi:494.4-497.31: Warning (interrupt_map): /axi/pcie@1000110000:interrupt-map: Missing property '#address-cells' in node /soc@107c000000/interrupt-controller@7fff9000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250822133407.312505-2-krzysztof.kozlowski@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>