| Age | Commit message (Collapse) | Author |
|---|
|
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Support & Features:
- Cirrus Logic CS42L43: Add support for the CS42L44 variant
- Khadas MCU: Add support for the VIM4 MCU variant along with
per-variant fan duty-cycle levels and optional fan supply regulator
support
- Maxim MAX77705: Add support for the PASS2 hardware revision
- MediaTek MT6397: Add AUXADC sub-device support for MT6397
- Motorola CPCAP: Support per-board sub-device compositions and add
the Tegra20 Mot composition
- ROHM BD73800: Add support for the BD73800 PMIC core, regulator,
RTC, clock gate, and GPIO sub-devices
- TI LM3533: Add VIN regulator supply support, configure initial
backlight mapping mode from Device Tree, and implement the
`backlight_scale` property
- X-Powers AC200: Add support for the AC200 I2C mixed-signal companion IC
Improvements & Fixes:
- Cirrus Logic CS42L43: Synchronize SoundWire enumeration work in
`remove()` before devres cleanup begins
- Dialog DA903x: Manage IRQ work cancellation and sub-device removal
via devres to prevent use-after-free during teardown
- Dialog DA9150: Balance `enable_irq_wake()` with
`disable_irq_wake()` during probe failure and driver removal
- Intel LPSS: Add DMI quirks for Dell Latitude 5285 and 7275 to
ignore ACPI resource conflicts on the I2C4 controller
- Intel Quark I2C/GPIO: Manage the fixed-rate clock and its clkdev
lookup with devres to fix a resource leak on unbind
- Maxim MAX77705: Select `REGMAP_I2C` and `REGMAP_IRQ` in Kconfig to
fix build errors
- Qualcomm WCD934x: Initialize the parent DMA mask to suppress "DMA
mask not set" warnings on child devices
- Qualcomm WCD934x: Pass the valid device pointer to
`dev_err_probe()` on IRQ lookup failure to avoid a NULL pointer
dereference
- Rockchip RK8xx: Register the poweroff handler in the atomic
`SYS_OFF_MODE_POWER_OFF` phase so polling I2C transfers complete
during shutdown
- ST-Ericsson AB8500: Use `devm_mfd_add_devices()` to prevent leaking
child devices on probe failure
- TI BQ257xx: Mark self-modifying BQ25792 configuration registers as
volatile
- TI LM3533: Set `coherent_dma_mask` to zero to suppress "DMA mask
not set" warnings
- TI TPS65217: Check for errors during IRQ initialization and
masking, and manage IRQ domain and wake teardown with devres
- TI TWL: Unregister the auxiliary platform device via a devres
action on probe failure and driver unbind
Cleanups & Refactoring
- Core: Convert drivers from deprecated `SIMPLE_DEV_PM_OPS()` to
`DEFINE_SIMPLE_DEV_PM_OPS()` and `pm_sleep_ptr()`
- Core: Fix spelling mistakes in comments across various MFD drivers
and headers
- Maintainers: Add ROHM BD73800 PMIC files under the ROHM PMIC entry
- Maintainers: Specify the `for-mfd-next` branch for the MFD and
Syscon git trees
- Dialog DA9062: Use `DEFINE_RES_IRQ_NAMED()` for IRQ resource
definitions
- Intel LPSS: Simplify DebugFS handling by dropping redundant error
checks and intermediate dentry variables, using octal permissions,
and switching to
`debugfs_remove()`
- Khadas MCU: Convert MFD cell arrays to `const` and use
`MFD_CELL_NAME()`
- ST-Ericsson AB8500: Fix a spelling typo in a comment
- TI LM3533: Convert from platform data to Device Tree bindings and
pass only regmap and light sensor presence to child devices
- TI LM3533: Remove driver-specific regmap wrappers, redundant pdata
helpers, and unnecessary `extern` qualifiers, and use `dev_groups`
for sysfs attributes
- Wolfson WM831x: Fix a spelling typo in a comment
Device Tree Binding Updates
- HiSilicon Hi6421 SPMI: Fix the compatible string to match
`hisilicon,hi6421-spmi`
- MediaTek MT6357: Allow an `adc` child node
- MediaTek MT6360: Allow two-cell interrupt specifiers with trigger
flags
- MediaTek MT6397: Document the `#sound-dai-cells` property
- MediaTek MT6397: Document the battery-backed NVMEM layout under the
RTC child node
- MediaTek MT6397: Document the MT6323 PMIC EFUSE child node
- Motorola CPCAP: Convert MFD and power button bindings to DT schema
and document the Mapphone and Mot compositions
- Qualcomm SPMI PMIC: Document the PM4125 audio codec compatible
- Qualcomm SPMI PMIC: Document the PMAU0102 PMIC compatible
- Qualcomm TCSR: Document the MSM8952 TCSR compatible
- Rockchip RK805: Fold the pin controller binding into the RK805 PMIC
DT schema
- ROHM BD73800: Document the BD73800 PMIC and its regulators
- ROHM PMIC: Factor out common pin properties into
`rohm,pmic-pins.yaml` and reference them across BD71815, BD71828,
and BD72720 bindings
- ST-Ericsson AB8500: Document AB8500 and AB8505 buck converter
regulators
- ST-Ericsson AB8500: Document codec audio graph ports, sound DAI
cells, and analog microphone wiring properties
- ST-Ericsson DB8500 PRCMU: Deprecate the `db8500-prcmu-regulators`
child node and make it optional
- Syscon: Document the Ambarella CV75 secure scratchpad compatible
- TI BQ25703A: Add the BQ25798 compatible with fallback to BQ25792
- TI Keystone: Convert Device State Control bindings to DT schema
- TI LM3533: Document the LM3533 LED controller, backlight, and
indicator LED bindings
- TI LP3943: Convert MFD and PWM bindings to DT schema
- TI TPS61050: Convert bindings to DT schema
- TI TPS65086: Make the `regulators` child node optional
- TI TPS65910: Document `wakeup-source` and GPIO hog child nodes
- TI TWL6040: Convert bindings to DT schema and align property names
with the driver
- X-Powers AC200: Document the AC200 mixed-signal companion IC"
* tag 'mfd-next-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (74 commits)
dt-bindings: mfd: db8500-prcmu: Deprecate EPOD regulators
dt-bindings: mfd: syscon: Add Ambarella CV75 secure scratchpad
dt-bindings: mfd: rockchip,rk805: Convert pinctrl to DT schema
mfd: intel-lpss: Add Dell Latitude 7275 to the resource conflict quirk
mfd: intel-lpss: Add resource conflict quirk for Dell Latitude 5285
mfd: tps65217: Use devres for IRQ domain and wake teardown
mfd: tps65217: Check return value when masking interrupt sources
mfd: tps65217: Fix NULL pointer dereference on IRQ init failure
dt-bindings: mfd: qcom,spmi-pmic: Add compatibles for pm4125-codec
mfd: bq257xx: Mark self-modifying BQ25792 registers volatile
dt-bindings: mfd: mediatek: mt6397: describe the RTC's nvmem layout
mfd: mt6397-core: Add mt6397 AUXADC support
mfd: max77705: Mark PASS2 revision as supported
mfd: ab8500: Fix child device leaks on probe failure
dt-bindings: mfd: Add MT6397 sound DAI cells
dt-bindings: mfd: mediatek: mt6397: Add mt6323 PMIC EFUSE
dt-bindings: mfd: hisilicon: Fix Hi6421 SPMI compatible
dt-bindings: mfd: ti,bq25703a: Expand to include BQ25798
dt-bindings: mfd: Allow MT6360 interrupt flags
dt-bindings: mfd: mediatek: Allow MT6357 ADC
...
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
- A bunch of improvements in dt-check-style. Fix various bindings based
on these additional checks.
- Convert hisilicon,hix5hd2-ir, hisilicon,hi6220-ade,
hisilicon,hi6220-dsi, hisilicon,hip05-sas-v1, MediaTek RT5650 codecs,
mediatek,g3dsys, mediatek,mt2701-scpsys, ti,omap-mpu, and
ti,omap-ocp2scp to DT schema format
- Add schemas for ST STM32MP2 DWC3 xHCI USB, ST STM32MP25 USB2-FEMTO
PHY, spacemit,k1-gpu and spacemit,k3-gpu, HiSilicon local bus,
HiSilicon HIP05 CPLD, SDMC DM2016, and QCom SM7250 and Kuno PDC
- Various binding updates to fix schema warnings in .dts files
- Drop obsolete .txt bindings for STM32(MP1) RCC, VExpress hwmon and
regulator, and mailbox.txt
- Remove the unused of_overlay_remove_all() function
- Fixes for of_check_msi_parent()
- Add "i2c-parent" tracking to fw_devlink
* tag 'devicetree-for-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (72 commits)
dt-bindings: usb: dwc3: Document ST STM32MP2 DWC3 xHCI USB controller
dt-bindings: iommu: Describe MT8195 infra IRQs
dt-bindings: clock: mediatek: Add MT8516 fallbacks
dt-bindings: media: Convert hisilicon,hix5hd2-ir to DT schema
dt-bindings: display: Convert hisilicon,hi6220-ade to DT schema
dt-bindings: display: Convert hisilicon,hi6220-dsi to DT schema
dt-bindings: phy: Document ST STM32MP25 USB2-FEMTO PHY
of: overlay: remove unused of_overlay_remove_all()
dt-bindings: power: Convert mediatek,mt2701-scpsys to DT schema
dt-bindings: bus: Add HiSilicon local bus
dt-bindings: gpu: img,powervr-rogue: add spacemit,k1-gpu and spacemit,k3-gpu
dt-bindings: interrupt-controller: qcom,pdc: Document SM7250 PDC
dt-bindings: vendor-prefixes: add Ambarella
dt-bindings: reset: Drop obsolete STM32(MP1) RCC bindings
dt-bindings: arm: keystone: ti,sci: Correct reg and mboxes constraints
dt-bindings: ASoC: Convert MediaTek RT5650 codecs bindings to DT schema
dt-bindings: scsi: Convert hisilicon,hip05-sas-v1 to DT schema
of/irq: Stop the MSI walk at the first msi-parent
of/irq: Fix device node refcount leak in of_check_msi_parent()
dt-bindings: display: faraday,tve200: Use a level-high interrupt
...
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Nothing special really, some new drivers, the usual trickle of fixes.
Oddly not even vary many LLM-assisted fixes, I guess they haven't
found their way into this subsystem yet.
Core changes:
- Support input-debounce-ns pin config property.
New drivers:
- Qualcomm:
- Hawi SoC TLMM and LPASS LPI TLMM
- Kuno (ARM32!) SoC TLMM
- MSM8952 SoC TLMM
- PMAU0102 SPMIO GPIO
- Starfive JHB100 SoC sys0, sys0h, sys1, sys2, per0, per1,
per2 per2pok and per3 (apparently strongly modularized silicon)
- Ambarella CV75
- Apple T8140 SoC used in iPhone 16 [Pro] and MacBook Neo
- Econet EN7528
- Allwinner Sunxi A733
- Mediatek MT6735
Improvements:
- Renesas RZ/3GL: SD channel PoC, I2C power source etc
- The SCMI pin controller uses generic helpers for handling
groups and functions"
* tag 'pinctrl-v7.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits)
pinctrl: stm32: program the EXTI mux from .alloc instead of .activate
pinctrl: stm32: Fix the unit of the hwspinlock timeout
pinctrl: stm32: Fix fwnode reference leak in stm32_gpiolib_register_bank()
dt-bindings: pinctrl: brcm,nsp-gpio: Convert to DT schema
pinctrl: mediatek: Add MT6735 pinctrl driver
dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Add bindings for MT6735 pin controller
dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Document MT6765 pin controller
dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Add MT6795
dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Improve pinctrl subnode and property descriptions
dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Pull pinctrl node changes from MT6795 document
pinctrl: tegra: xusb: free maps on DT map failure
pinctrl: sprd: free maps on DT map failure
pinctrl: kconfig: Select generic pinctrl helpers for scmi pinctrl
pinctrl: scmi: Replace pinctrl ops get group info with generics
pinctrl: scmi: Replace pinmux ops get function info with generics
pinctrl: ambarella: fix NULL vs IS_ERR() bug in amb_pinctrl_register()
pinctrl: starfive: fix missing CONFIG_OF dependencies
pinctrl: ambarella: add CONFIG_OF dependency
pinctrl: apple: Add t8140-pinctrl support
dt-bindings: pinctrl: apple,pinctrl: Add t8140 compatible
...
|
|
Pull SoC devicetree updates from Arnd Bergmann:
"This is a rather large update of over 1000 non-merge commits touching
devicetree files and bindings.
A few notable SoC were added this time:
- Apple M4 and A18 Pro are used in laptops, these follow the M3 model
added in 7.2.
- Google Laguna (aka Tensor G5) is used last year's Pixel phone
generation. Unlike the earlier Tensor chips, this is not based on
Samsung's Exynos family design but starts a new chip family.
- Qualcomm's Hawi and Nord SoCs are two powerful chips using the
custom Oryon cores. Product names and applications are so far not
known, which means that Qualcomm is doing something right by
upstreaming kernel support early.
The ST stm32mp23xc/stm32mp25xc SoC support was previously removed
because there were no users upstream, but they are back now that
boards have shown up. Renesas RZ/G2M v3.0 (R8A774A3) is just a minor
variation of the already supported SoC.
In total, there are 81 new dts files for individual boards, and they
are all over the place. Only one riscv based machine is added, the
Milk-V Meles SBC using the T-Head th1520 chip. For 32-bit Arm, we have
13 new boards. About half are industrial embedded boards using NXP
i.MX6/7 chips, the rest are older products: two Amazon tablets, two
Motorola phones and two SoM boards.
Everything else is 64-bit Arm:
- many industrial embedded boards using NXP layerscape, NXP i.MX8/9,
Qualcomm Hamoa, ST stm32mp2, Rockchip rk35xx, and Renesas RZ/G2
SoCs
- Laptops and tablets using Apple M4, Qualcomm Snapdragon X2,
Snapdragon X1 Elite and Allwinner A133 chips
- Valve Steam Frame VR headset using Snapdragon 8 Gen 3
- Seven handheld game consoles using Qualcomm Dragonwing qcs8550
- Mobile phones using Google Tensor G5, Samsung Exynos 850, and
various Qualcomm Snapdragon chips
Aside from the new stuff, there is still a lot going on for existing
socs and boards, including GPU hardware support on MediaTek MT8173
based laptops. Most patches actually add features this time, as the
compile-time diagnostic changes are slowing down"
* tag 'soc-dt-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1022 commits)
arm64: dts: rockchip: Add Radxa E54C
dt-bindings: arm: rockchip: Add Radxa E54C
arm64: dts: rockchip: remove FRL GPIO for 100ASK DshanPi A1
arm64: dts: rockchip: fix M.2 E-key reset pinctrl on rk3588 rock-5-itx
arm64: dts: rockchip: add pcie30phy data-lanes on rk3588 coolpi-cm5-evb
arm64: dts: rockchip: Add the fan tachometers to Kobol Helios64
arm64: dts: rockchip: enable NPU on Radxa E52C
arm64: dts: rockchip: fix adc button voltage on Radxa E52C
riscv: dts: sophgo: sg2002-milkv-duo256m: drop reserved memory node
riscv: dts: sophgo: cv1800b-milkv-duo: drop reserved memory node
arm64: dts: nuvoton: npcm845-evb: Add peripheral nodes
arm64: dts: nuvoton: npcm845-evb: Fix DTS coding style
arm64: dts: nuvoton: npcm845: Add peripheral nodes
arm64: dts: nuvoton: npcm845: Split APB address ranges
riscv: dts: sophgo: cv180x: Fix internal ephy node name
riscv: dts: sophgo: add Milk-V Duo 256M ethernet support overlay
riscv: dts: sophgo: Limit SG2042 SPI NOR to 12.5 MHz
riscv: dts: sophgo: Enable SPI NOR on SRD3-10
riscv: dts: spacemit: set ETH MAC from eeprom for OrangePi
arm64: dts: allwinner: sun50i-h616: Add video engine
...
|
|
pinctrl-rk805.txt describes the pinmux controller that is part of the
Rockchip RK805 PMIC. The PMIC itself is already described by
rockchip,rk805.yaml, so the pinmux part belongs there as well: the
pinctrl node is a child of the PMIC node, not a separate device.
Fold the pinmux description into rockchip,rk805.yaml and drop the
standalone text binding.
While doing so, add the missing child node schema. The rockchip,rk805.yaml
schema ends with 'additionalProperties: false' but did not describe the pin
configuration child nodes at all, so a valid pinmux node like the one shown
in pinctrl-rk805.txt was rejected:
pmic@18 (rockchip,rk805): 'rk805-default-pins' does not match any of
the regexes: '^pinctrl-[0-9]+$'
The pin configuration nodes require 'pins'; without it a node that names
no pin is accepted silently, while the text binding it replaces listed
'pins' as required. The RK805 exposes two output-only GPIOs, so 'pins' is
an enum of gpio0 and gpio1 and a typo such as "gpio2" is caught.
The nodes may be direct children of the PMIC, or sit one level deeper
inside a "pinmux" grouping node, which is the layout the example of the
text binding used. pinctrl-bindings.txt allows the configuration nodes to
be grandchildren of the pin controller, and the driver reaches both
layouts: pinconf_generic_dt_node_to_map() parses the referenced node and
then walks its children. The example shows both.
The example also regains the gpio-controller and #gpio-cells lines that the
example of the text binding had.
Reported-by: Sashiko <sashiko-bot@kernel.org>
Link: https://sashiko.dev/#/patchset/20260923034245.396417-1-quchaosheng000406@163.com?part=1
Link: https://sashiko.dev/#/patchset/20260923062746.516666-1-quchaosheng000406@163.com?part=1
Link: https://sashiko.dev/#/patchset/20260923074337.575122-1-quchaosheng000406@163.com?part=1
Assisted-by: LLM
Signed-off-by: Quchaosheng <quchaosheng000406@163.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260923083001.606935-1-quchaosheng000406@163.com
Signed-off-by: Lee Jones <lee@kernel.org>
|
|
The brcm,nsp-gpio-a compatible used by the NSP GPIO controller was only
documented in the legacy text binding, so dtbs_check reported "failed to
match any schema" for the gpio@20 node in bcm-nsp.dtsi.
Convert the text binding to DT schema. Beyond a direct conversion:
- Require pin configuration nodes to use a '-pins' suffix and GPIO hogs
a '-hog' suffix, as the old example used arbitrary node names. No
in-tree DTS has child nodes under this controller, so nothing is
affected.
- Document slew-rate, which the driver supports but the text binding
never listed.
- Add #interrupt-cells and gpio-line-names, and make #interrupt-cells
depend on interrupt-controller.
Assisted-by: LLM
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel
Qualcomm pin control updates for v7.4-rc1
New drivers:
- add the TLMM drivers for Kuno and MSM8952
- add the LPASS LPI driver for Hawi
New model support:
- support PMAU0102 GPIO in pinctrl-spmi-gpio
Driver improvements:
- fix/unify naming convention in defines specific to Qualcomm pinctrl
drivers
- extend debugfs verbosity for pinctrl-lpass-lpi
- make the return type from kcalloc() const in tlmm-test
Devicetree bindings:
- add binding documents for new drivers
- document compatibles for new models
- document the gpio-line-names property for qcom,sc8280xp-tlmm
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
controller
Add DT bindings for the MT6735 pin controller.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
The MT6765 pin controller has had a driver for a while, but DT
bindings were never documented for it.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Combine MT6795 pin controller document into MT6779 one. In the
process, amend the example with comments and additional pinctrl
nodes from the MT6795 example, replace the current interrupts
property description with the one from the MT6795 document since
it makes more sense and define its items using conditionals
as they now vary between variants. Also use conditionals to define
valid values for the drive-strength property as well as items of
the interrupts property for each variant since they are different
on MT6795.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
property descriptions
Change "subnodes" to "subnode" in subnode description for better
grammatical accuracy, wrap all descriptions at 80 characters, and remove
literal style indicators from descriptions that don't need their new lines
preserved.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
from MT6795 document
mediatek,pinctrl-mt6795.yaml has different node name patterns which match
bindings of other MediaTek pin controllers, ref for pinmux-node.yaml which
has a description of the pinmux property, as well as some additional
descriptions for some pin configuration properties. Pull those changes
into mediatek,mt6779-pinctrl.yaml and adjust the example DTS to match in
preparation to combine the MT6795 document into it.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
The pinctrl_ap GPIO controller on the MacBook Neo crashes upon reading
REG_GPIOx for certain pins. These pins, which are also listed in Apple's
device tree, are described by the gpio-reserved-ranges property.
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
|
|
Document the CV75 pin controller binding using generic function and
groups properties for pinmux configuration.
Reviewed-by: Linus Walleij <linusw@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Long Zhao <longzhao@ambarella.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add pinctrl bindings for StarFive JHB100 SoC Peripheral-3(per3) pinctrl
controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add pinctrl bindings for StarFive JHB100 SoC Peripheral-2 Power OK
(per2pok) pinctrl controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add pinctrl bindings for StarFive JHB100 SoC Peripheral-2(per2) pinctrl
controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add pinctrl bindings for StarFive JHB100 SoC Peripheral-1(per1) pinctrl
controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add pinctrl bindings for StarFive JHB100 SoC Peripheral-0(per0) pinctrl
controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add pinctrl bindings for StarFive JHB100 SoC System-2(sys2) pinctrl
controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add pinctrl bindings for StarFive JHB100 SoC System-1(sys1) pinctrl
controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add pinctrl bindings for StarFive JHB100 SoC System-0 host(sys0h) pinctrl
controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add pinctrl bindings for StarFive JHB100 SoC System-0(sys0) pinctrl
controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
The StarFive JHB100 SoC hardware supports debounce time configuration
with nanosecond granularity. The existing 'input-debounce' property
uses microseconds, which is insufficient to accurately represent the
hardware's finer timing steps.
Add the property 'input-debounce-ns' to specify debounce time in
nanoseconds as an alternative to the existing 'input-debounce' which
uses microseconds. Make the new property unavailable when the existing
property 'input-debounce' is selected to prevent conflicting definitions.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v7.4
- Add SD power source support on RZ/G3L,
- Add I3C power source support on RZ/G3S,
- Miscellaneous fixes and improvements.
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
QUP1 SE2 and SE3 pack all four of their lanes pair-wise onto only two
pins each: lanes 0/1 (I2C SDA/SCL) at mux value 2 and lanes 2/3 (UART
TX/RX) at mux value 1, on gpio127/gpio128 and gpio129/gpio130
respectively.
Both mux values were named "qup1_se2" (respectively "qup1_se3"), so the
two distinct lane pairs became indistinguishable. msm_pinmux_set_mux()
stops at the first entry matching the requested function, which means
mux value 1 was always selected and the I2C lanes could never be muxed
out. In practice i2c9 and i2c10 got the UART lanes and did not work,
while uart9 and uart10 happened to be muxed correctly.
Give each lane pair its own function, following the _01/_23 naming
already used for the same hardware arrangement by the shikra, eliza,
hawi and maili TLMM drivers. Both functions still cover the full pin
pair, so a single pinctrl state per protocol remains sufficient.
Drop gpio129/gpio130 from the SE2 group list, since those pins
belong to SE3 and were never reachable through the SE2 function.
Also rename QUP1 SE2/SE3 functions in the binding doc accordingly.
While at it, add missing "gpio", "qup3_se0_mira" and "qup3_se0_mirb"
to the binding function enum to get the list complete.
Fixes: c24dd0826f06 ("pinctrl: qcom: add the TLMM driver for the Nord platforms")
Cc: stable@vger.kernel.org
Assisted-by: LLM
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260830030201.135637-1-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Correct indentation in the examples to consistent 2- or 4-spaces
indentation to fix dt-check-style warnings ("example 0
[indent-consistent] indent mismatch ..."). Preferred is 4-spaces, but
re-indenting entire example just for that is too much churn.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Gary Yang <gary.yang@cixtech.com>
Reviewed-by: Michal Simek <michal.simek@amd.com> # ZynqMP
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
The A733 contains a pin controller similar to previous SoCs, although
with a change in the MMIO register frame layout.
This SoC uses the new style of DT binding, where the pinmux values for
each pin group are stored in the new "allwinner,pinmux" property in the
DT node.
Add the new compatible to the existing A523 binding, since they share a
lot of features, including the number of banks and clocks.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
YAML files do not use tabs, even within the values in DTS. No
functional change, although dt-style-check will warn about it
("[tab-in-yaml] tab character not allowed in DTS example").
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Convert TI Palmas pin control text binding to DT schema. The legacy
binding allowed any subnode name. Restrict them to standard prefixes to
prevent the validator from accidentally evaluating standard integer
properties (like phandle) as child nodes.
Signed-off-by: Bhargav Joshi <j.bhargav.u@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add device tree bindings for the TLMM pin controller
found on the Qualcomm MSM8952 platform.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Muzaffer Kadir <muzafferkadir@mainlining.org>
Link: https://patch.msgid.link/20260907-msm8952-pinctrl-v5-1-9a2d8d72ffdb@mainlining.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
|
|
source option
The I3C pins on the Renesas RZ/G3S SoC can be powered at either 1.2V or
1.8V. Document the missing 1.2V power source option.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://patch.msgid.link/20260904125425.412632-5-claudiu.beznea+renesas@tuxon.dev
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
|
The list of allowed pinconf properties already includes input-enable and
output-enable, but omits their -disable counterparts.
Each pair controls the same bit. Where enable (set) is supported so is
disable (clear).
Add input-disable and output-disable to the list.
Reviewed-by: Linus Walleij <linusw@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Josua Mayer <josua@solid-run.com>
Link: https://patch.msgid.link/20260904-rzg2-sr-boards-v8-2-94c4674927e8@solid-run.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
|
The SC8280XP TLMM GPIO controller exposes 230 GPIO lines. Allow boards to
provide descriptive names for these lines and constrain the list to the
number of GPIOs exposed by the controller.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Xilin Wu <sophon@radxa.com>
Link: https://patch.msgid.link/20260901-q8b-dts-v1-5-7de0b6a73d08@radxa.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
|
|
Add device tree bindings for the Top Level Mode Multiplexer (TLMM) pin
controller block found on the Qualcomm Kuno platform.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Hardeep Sharma <hardeep.sharma@oss.qualcomm.com>
Link: https://patch.msgid.link/20260827-kuno-soc-support-v5-8-6d47636a8f09@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
|
|
Add compatible string for the PMAU0102 PMIC GPIO block, which has 12
GPIOs, used on Nord platform.
Signed-off-by: Dhruvin Rajpura <drajpura@qti.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260830042939.144376-2-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
|
|
Add the binding for the pin controller found on the EcoNet EN7528 MIPS
SoC. It shares the IP with the Airoha pin controllers, but its IOMUX and
pin configuration registers have a different layout, so it gets its own
compatible.
The CHIP SCU holding those registers is referenced by the airoha,chip-scu
phandle.
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add bindings for the pin controller in Low Power Audio SubSystem (LPASS)
of Qualcomm Hawi SoC.
The controller has 23 GPIOs (gpio0-gpio22) with functions including
SoundWire, I2S, DMIC, VA I2S, ext_mclk1, slimbus and lpass_lpi_dbg_clk.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
Link: https://patch.msgid.link/20260821113548.2686650-2-prasad.kumpatla@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
|
|
Correct a few white-space issues around <>, which will be flagged by
dt-check-style. No functional changes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Leo Yan <leo.yan@arm.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Lee Jones <lee@kernel.org>
Link: https://patch.msgid.link/20260826102044.142986-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
|
|
The pin controller on the Apple silicon t8132 (M4) SoC is compatible
with t8103. Add "apple,t8132-pinctrl" as SoC specific compatible under
"apple,t8103-pinctrl".
Reviewed-by: Linus Walleij <linusw@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
Link: https://patch.msgid.link/20260811-apple-m4-initial-devicetrees-v3-5-6bf32d45ad0b@cyberchaos.dev
Signed-off-by: Sven Peter <sven@kernel.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Core changes:
- Use the non-blocking mux_state_try_select() in the generic MUX pin
control back-end
- Free pin maps on pinctrl_generic_to_map() failure in the core
helpers
New hardware pin control:
- Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC
(this is for the low power audio, LPASS = Low Power Audio SubSystem
portions)
- Upboard support on top of the Intel pin controller
- Apple T6030 and T6031 support (just compatible strings)
- Samsung Exynos 8855 SoC
- Mediatek MT6858 SoC
- Rockchip RK3308B and RV1106 SoCs
- Airoha EN7523 and AN7563 SoCs
Improvements:
- Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable
- Qualcomm improvements on top of the Qualcomm PDC (power domain
controller) irqchip improvements from tglx:s tree
- Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups
- The NPCM8xx driver has been put into shape fixing many pin and
group definitions
- Some non-urgent Tegra 264 pin assignments are fixed up
- Some non-urgent fixups to Airoha AN7581 and AN7583 registers and
pin assignments, missing features etc"
* tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits)
dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema
pinctrl: meson: sync some modify from A4
pinctrl: meson: a4: Add input enable pin configuration
pinctrl: realtek: rtd1625: remove unused group name spdif_sel
pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13
dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema
Revert "Merge branch 'ib-rsk7204' into devel"
pinctrl: rockchip: Add RV1106 pinctrl support
dt-bindings: pinctrl: rockchip: Add RV1106 compatible
pinctrl: rockchip: Decode drive strength in the get function
pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable
pinctrl: airoha: add support of an7563 SoC
dt-bindings: pinctrl: airoha: add support of an7563 pin controller
pinctrl: airoha: try to find chip scu node by phandle first
pinctrl: airoha: add support of en7523 SoC
dt-bindings: pinctrl: airoha: add support of en7523 pin controller
pinctrl: airoha: an7583: add support for olt pinmux
pinctrl: airoha: an7583: add support for pon_alt pinmux
pinctrl: airoha: an7583: add support for npu_uart pinmux
dt-bindings: pinctrl: airoha: an7583: add missed features
...
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel
Qualcomm pinctrl updates for v7.3-rc1
New drivers:
- add pinctrl drivers for Maili TLMM and Elize LPASS LPI TLMM controllers
Driver updates:
- acknowledge interrupts for the PDC interrupt controller in pinctrl-msm
- implement irq_get/set_irqchip_state() for pinctrl-msm
- add support for a new model to Qualcomm pinctrl-spmi-gpio
- drop some dead code from qcom pinctrl modules
Devicetree bindings:
- document new TLMM controllers and the new model for the SPMI GPIO
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Convert the Texas Instruments DA850/OMAP-L138/AM18x pullup/down
controller bindings to DT schema.
Signed-off-by: Eduard Bostina <egbostina@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Convert Microchip PIC32 Pin Controller devicetree binding
from legacy text format to DT schema.
Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Add the compatible for the pin controller of the Rockchip RV1106 and
its RV1103 package variant.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Introduce device tree binding schema for Airoha AN7563 SoC pin controller.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Introduce device tree binding schema for Airoha EN7523 SoC pin controller.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
Changes:
* add npu_uart pin-group support for uart pin-function
* add pon_alt pin-group support for pon pin-function
* add support for olt pin group/function
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
|
add mux to force enable i2c0 bus.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Linus Walleij <linusw@kernel.org>
|
