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3 daysMerge tag 'riscv-for-linus-7.4-mw1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Paul Walmsley: - Add support for crash hotplug - Improve user copy performance on cores with fast misaligned accesses - Optimize code paths involving pgtable_l{4,5}_enabled() by patching in the return values during early boot (since these don't change during runtime), or by specifying the return values directly in Kconfig files (for purpose-built kernels) - Change the PCIe bus reassignment behavior to depend on the PCI_REASSIGN_ALL_BUS PCI flag (as ARM64 does) - Avoid an unnecessary sstatus CSR read during context switch - Make the sbi_ecall() macro variadic, improving code clarity - Refactor __switch_to_vector() to prepare for upcoming vector context switch optimizations - Add a kselftest for vectorized user copy - Add bounds checking on the shadow stack restore token address to avoid it being used as an attack vector - Fix the shadow stack and indirect branch landing pad control functions to only update the CPU's envcfg CSR when operating on the current task - For MIPS RISC-V systems, add support for early boot-applied errata; and for P8700 RISC-V systems, avoid WFI usage in the kernel (since it is buggy) - Add the "B" RISC-V ISA extension to hwcap and hwprobe reporting - Add support for specifying and reporting the "Zic64b" RISC-V ISA extension, and add it to the SpacemiT K1, K3, and Sophgo SG2044 DT files - Require the block size of cache management operations to be specified in DT schema validation for the RISC-V ISA extensions Zicbom, Zicbop, and Zicboz - Some miscellaneous fixes: fix an incorrect bitfield width in the RVG_SYSTEM_CSR_MASK bitmask macro; make RISCV_ALTERNATIVE mandatory, now that XIP kernel support has been removed; and remove some unnecessary includes in kernel/smp.c * tag 'riscv-for-linus-7.4-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (28 commits) riscv: mm: unexport _pgtable_l4_enabled and _pgtable_l5_enabled riscv: introduce RISCV_ISA_SV48 and RISCV_ISA_SV57 riscv: support early isa ext and use it to optimize pgtable_l4|l5_enabled riscv: convert pgtable_l4|l5_enabled to inline function riscv: remove RISCV_ALTERNATIVE Kconfig option riscv: Add a getter for user PMLEN support riscv: dts: sophgo: sg2044: Add Zic64b ISA extension riscv: dts: spacemit: k1: Add Zic64b ISA extension riscv: dts: spacemit: k3: Add Zic64b ISA extension riscv: Add Zic64b to cpufeature and hwprobe dt-bindings: riscv: Add Zic64b extension description dt-bindings: riscv: Require block-size for Zicbom, Zicbop, and Zicboz riscv: Add B to hwcap and hwprobe riscv: remove unused profile.h includes riscv: cfi: Only write envcfg CSR when task is current riscv: cfi: Bounds check restore token before swap riscv: Add ERRATA_MIPS_P8700_WFI to replace WFI with mips.pause selftest: riscv: test vectorized user copy riscv: vector: refactor context switch for kernel-mode vector riscv: do not read csr in vector context switch ...
5 daysMerge tag 'platform-drivers-x86-v7.4-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform driver updates from Ilpo Järvinen: "The usual updates for laptop quirks from HP, ASUS, Acer, Dell etc: - new model names and recent CPU support - more special button / function key handling - battery and hardware monitoring quirks Tool updates to intel-speed-select WMI now supports non-x86 architectures Miscellaneous cleanups / refactoring / improvements" * tag 'platform-drivers-x86-v7.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (237 commits) platform/x86: asus-wmi: name the TUF keyboard RGB state and speed codes platform/x86: asus-wmi: fix TUF keyboard power state shutdown naming platform/x86: asus-wmi: rename TUF RGB state DEVID to _CMD platform/x86: asus-armoury: add power limits quirk for GU605CM platform/x86: asus-armoury: add power limits quirk for G533QS platform/x86: asus-armoury: add power limits quirk for GA402NV platform/x86: asus-armoury: add power limits quirk for FA608UP platform/x86: asus-armoury: add power limits quirk for FA608UH platform/x86: asus-armoury: add power limits quirk for FA608PM platform/x86: asus-armoury: add power limits quirk for G713QR platform/x86: ibm_rtl: Fix potential OOB read at signature search platform/x86: acer-wmi: Add support for Acer Nitro AN16-41 platform/x86: acer-wmi: Cycle platform profile on mode key 0x4 platform/x86: hp-wmi: Disable hwmon attributes when no fans are usable platform/x86: gpd pocket fan: Cancel work before releasing GPIOs platform/x86: asus-armoury: Add XBOX ROG Ally X 20 Tunables platform/x86: msi-wmi: Ignore WMI events for keys also handled by atkbd platform/x86: msi-wmi: Sort scancodes numerically platform: arm64: Add a driver for the EC found on ASUS Glymur machines MAINTAINERS: Add myself as a LENOVO drivers co-maintainer ...
9 daysMerge tag 'iommu-updates-v7.4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux Pull IOMMU updates from Joerg Roedel: "Core: - Detect scatterlist length overflows and finalize deferred domain attachments before mapping MSI pages - Consolidate x86 MSI reserved-region handling and clean up internal DMA and SVA helpers AMD IOMMU: - Add IOMMU PerfOpt support, enabled by amdgpu for supported integrated GPUs in identity domains - Restrict forced identity mapping to GPUs that require it - Fix kdump device-table allocation and reuse, ATS configuration error handling, and an interrupt-remapping allocation leak - Clean up device probing and initialization - Add Vasant Hegde as an AMD IOMMU maintainer ARM SMMUv2: - Device-tree binding updates for Qualcomm Maili and Nord SoCs ARM SMMUv3: - Work around hardware integration issue on Google Tensor G5 SoCs where all DMA transactions appear as instruction fetches - Allow command queue size to be configured on the kernel command-line - Reduce queue sizes when running as a kdump kernel - Fix some pre-existing issues in the driver and kunit tests reported by Sashiko - Fix handling of Arm hardware errata relating to the contiguous hint when using SVA - Rework the TLB invalidation logic in preparation for enabling iommu-pt in future - Minor cleanups in preparation for improving support for kdump Apple DART: - Support device-tree DMA aperture specifications Broadcom: - Add BCM2712 IOMMU support for Raspberry Pi 5 display and multimedia devices, including the generic page-table format and shared TLB cache management Hyper-V: - Add a para-virtualized guest IOMMU driver with guest-managed stage-1 page tables and page-selective IOTLB invalidation Intel VT-d: - Enhanced IQE fault handling for batched multiple descriptors, - Optimization of page-table level calculation in compute_vasz_lg2_ss(), - Fixes for several pre-existing issues reported by Sashiko, - General cleanup and refinement RISC-V: - Report cache-coherency capability for coherent devices, enabling VFIO/iommufd use Samsung Exynos: - Support SysMMUs without BLOCK mode, fixing their enable sequence and TLB invalidation - Improve v7 fault diagnostics with transaction information" * tag 'iommu-updates-v7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux: (69 commits) MAINTAINERS: Make Vasant Hegde AMD IOMMU maintainer iommu/hyperv: Make hv_iommu_device static iommu/hyperv: Add missing PCI dependency for the guest IOMMU driver iommu/amd: Don't allocate kdump device table from DMA32 iommu/amd: Program device table when kdump reuse fails iommu/dma: Clean up redundant MSI cookie check iommu/dma: Catch scatterlist length overflows iommu/hyperv: Add page-selective IOTLB flush support iommu/hyperv: Add para-virtualized IOMMU support for Hyper-V guest iommu/x86: Add architectural MSI reserved region helper Drivers: hv: Add logical device ID registry for vPCI devices hyperv: Introduce new hypercall interfaces used by Hyper-V guest IOMMU iommu: Make iommu-dma helpers private iommu/arm-smmu-v3: Don't rb_erase() a never-inserted stream node iommu/arm-smmu-v3: Add Q_POS() macro iommu/arm-smmu-v3: Add arm_smmu_attach_release() iommu/arm-smmu-v3: Disable the impl before disabling the SMMU on shutdown iommu/arm-smmu-v3: Populate the tlbi at the top of the call chain iommu/arm-smmu-v3: Precompute the invalidation commands iommu/arm-smmu-v3: Keep track in arm_smmu_invs if range invalidation is used ...
10 daysMerge tag 'mm-stable-2026-10-19-21-33' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm Pull MM updates from Andrew Morton: - "selftests/mm: improve khugepaged coverage" (Kiryl Shutsemau): Give khugepaged a proper workout. Extend the tests to all supported mTHP orders, check exactly which windows collapsed, and make scan completion deterministic. Race collapse against faults, pinning, fork and remap; verify that the contents survive. Add coverage for whole-page-table zaps and memory pressure too. - "selftests/mm: separate GUP microbenchmarking from functional testing" (Sarthak Sharma): Untangle GUP benchmarking from correctness testing. Move the benchmark into tools/mm, add a standalone harness-based GUP selftest, and move shared helpers into tools/lib/mm. Give each tool one job instead of mixing timing measurements with correctness checks. Cover the mapping, pinning and batch-size combinations explicitly. - "mm: Switch device DAX to section-based vmemmap optimization" (Muchun Song): Apply section-based vmemmap optimization to device DAX. Rework the backing metadata layout to save memory while preserving the handling of device memory hotplug and its different alignment and lifetime requirements. - "mm: Introduce section-based vmemmap optimization for HugeTLB" (Muchun Song): Cut the memory consumed by HugeTLB's struct page array with section-based vmemmap optimization. Arrange the metadata so large huge pages need fewer backing pages, while keeping initialization, teardown and the various hugepage configurations straight. - "mm/huge_memory: clean up and decouple the anon and file split helpers" (Kairui Song): Separate anonymous and file-backed folio splitting, which have rather different locking and bookkeeping requirements. Move the work into separate helpers, drop dead checks and tidy swap-cache handling. Fix error paths, including one that could leave a folio frozen. Keep the swap cache cases separate from file-cache splitting. - "mm: Unconditional per-VMA locks and cleanups" (Dave Hansen): Make per-VMA locking unconditional and clean up the old conditional code around it. This removes configuration-dependent plumbing and lets callers depend on one locking model rather than carrying both cases along. - "memcg: remove the v1 soft limit" (Shakeel Butt): Remove the old cgroup v1 memory soft-limit machinery. This has long since been superseded by the newer memory-control interfaces; hauling around a separate reclaim scheme for it no longer buys us much. - "read proc/pid/smaps_rollup under per-vma lock" (Suren Baghdasaryan): Read /proc/PID/smaps_rollup using per-VMA locks where possible, rather than holding mmap_lock across the entire walk. Retain the contention fallback and add tearing tests. This considerably reduces latency when another thread is busy changing its mappings. - "mm/damon: introduce data access-as-a-data attribute" (SJ Park): Teach DAMON to expose memory access observations as data attributes, making them available to the probe and filtering machinery. Extend the interfaces, documentation and tests so the new information can be used rather than merely collected. - "Remove PG_private by using page/folio->private checks instead" (Zi Yan): Get rid of PG_private and use the folio's private pointer to say whether private data is attached. Convert the filesystem users, including erofs, f2fs and md, and clean up the old accessors and flags. There are a few special cases, notably swapcache and hugetlb, which need explicit care. - "mm: make userland page table freeing RCU-safe" (Lorenzo Stoakes): Make freeing userspace page tables safe against RCU readers. Sort out the page-table lifetime and locking rules so walkers cannot stumble over freed tables while mappings are being torn down. - "make unused huge shrinker memcg aware" (Qi Zheng): Make shmem's unused-huge-folio shrinker aware of memory cgroups, so reclaim can find those folios under the right memcg. Wire up the per-memcg tracking and its lifetime rules, and give the shrinklist its own lockdep class to avoid spurious dependency reports. - "mm: Drop pxd_ERROR()" (Anshuman Khandual): Remove the old pxd_ERROR() page-table checks and their architecture-specific baggage. Simplify the common page-table interfaces and callers now that these checks no longer serve a useful purpose. - "memcg: group struct fields by access pattern" (Shakeel Butt): Rearrange memcg's hot and cold fields according to how they're actually accessed. Keep frequently updated counters and their neighboring state from fighting over cachelines and reduce needless cacheline traffic. - "mm/damon/core: fix the size charged for a filter-trimmed region" (Donggeun Yoo): Fix DAMOS quota accounting when a filter trims a monitoring region. Charge only the part left after filtering, not the original region, and add KUnit coverage. Previously the excluded memory could eat into the quota and make schemes run more slowly than requested. - "mm/damon: add kunit and selftests for probes and probe weights" (SJ Park): Add more tests for DAMON probes and their weights, including validation and the results reported to userspace. This is mostly about catching regressions in the newer probe infrastructure before they become harder to diagnose. - "mm: memcontrol: constify the read side of the read side of the memcg API" (Tal Zussman): Mark the read-only parts of the memcg interface const, from folio and lruvec accessors to counters and swap helpers. Most of this is mechanical, but it makes the contracts clearer and lets the compiler catch accidental writes. - "mm/damon/vaddr: support {prep,apply}_probes" (SJ Park): Support the new prepare/apply probe operations in DAMON's virtual-address backend. This brings vaddr monitoring into line with the probe infrastructure and makes the added probe types useful there too. - "mm/mglru: clean up folio counters and flag usage" (Kairui Song): Simplify MGLRU's folio counters and flag handling. Remove redundant accounting paths and make the state transitions easier to follow without changing the intended reclaim policy. - "arch, mm/execmem: resolve confusion about set_direct_map_valid_noflush()" (Mike Rapoport (Microsoft)): Clarify and straighten out the set_direct_map_valid_noflush() interface across architectures and execmem. Make the requested mapping changes and the callers' expectations agree, rather than relying on subtly different architecture behavior. - "mm: zswap: free cold writeback folios promptly" (Alexandre Ghiti): Free zswap writeback folios as soon as their disk write completes. They are cold temporary buffers, so putting them on the LRU only makes reclaim rediscover them later. Extend swap-cache dropbehind and let zswap keep these folios off the LRU altogether. - "mm: gup: cleanup gup_fast call chain" (Aristeu Rozanski): Clean up the GUP-fast call chain and simplify how the fast-path helpers pass their arguments and results around. Keep the page-pin behavior the same while making the call sequence easier to maintain. - "mm: optimize zone-device memmap initialization" (Li Zhe): Speed up initialization of zone-device struct pages. Avoid redundant work when setting up large device-memory ranges, where touching every descriptor can get expensive. - "mm/zswap: shrink zswap_entry via a pool id" (Jianyue Wu): Reduce the size of zswap_entry by storing a compact pool identifier instead of a full pointer. Keep the pool lookup and lifetime handling correct while saving per-entry metadata. - "mm/damon: support access monitoring of hugetlb-backed memory" (Krishna Iyer): Let DAMON monitor hugetlb-backed memory too. Extend the relevant access checks and add coverage so those mappings no longer fall through a hole in the monitoring machinery. - "mm/execmem: fixes and cleanups for the ROX cache" (Mike Rapoport): Tidy execmem's read-only-executable cache and fix its handling of the awkward allocation and release cases. The aim is to make the cache's ownership and permission transitions more predictable. - "zsmallc: remove old object read API" (Sergey Senozhatsky): Drop zsmalloc's old object-read API and move its remaining users to the supported access mechanism. This removes a duplicate interface which we no longer need. - "mm/mempolicy: stop copying state in the interleave paths" (Gregory Price): Stop copying mempolicy state in the interleave paths when a reference to the existing policy will do. This avoids extra work and makes the ownership rules less obscure. - "mm/mglru: speed up inc_min_seq() and fix cold/hot inversions" (Barry Song): Make MGLRU's generation advancement cheaper and fix cases where cold and hot folios end up in the wrong order. Adjust the counter and list handling so reclaim doesn't keep passing over the better eviction candidates. - "mm: Fix MF_DELAYED handling on memory failure" (Lisa Wang): Treat MF_DELAYED as a partially completed memory-failure operation, not an outright failure. Propagate that result correctly through shmem and the generic handler, fix the extra-reference accounting, and add tests for the resulting SIGBUS behavior. - "tools/mm/page_owner_sort: fix --sort, add module filter, improve usage" (Ye Liu): Fix page_owner_sort's --sort handling, add module-based filtering and make the usage output more helpful. This makes the tool less frustrating when tracking down who is holding on to pages. - "mm/damon: move damos filter range arguments validation to core" (SJ Park): Move DAMOS filter range validation into the core, where all callers can share it. Also close the sysfs read-twice races which could pass inconsistent ranges, and add tests for invalid input. - "mm/damon: misc cleanups" (Zenghui Yu): Clean up a collection of small DAMON rough edges in the core, interfaces and tests. No large behavior change here, just simpler code and fewer opportunities for confusion. - "mm/damon: cleanup code, add test cases, and update guidances in docs" (SJ Park): Clean up DAMON's core and interfaces, add missing test cases and bring the documentation into line with the code. These changes should make the newer facilities easier to understand and maintain. - "mm/damon: introduce hugepage_size probe filter" (SJ Park): Add a DAMON probe filter for hugepage size. Let users select a range of folio sizes through sysfs, validate the range and document the new interface, so monitoring can concentrate on memory backed by the desired hugepage sizes. - "selftests/mm: pagemap_ioctl test fixes and cleanups" (Zenghui Yu): Fix some pagemap ioctl test assumptions and clean up their setup and reporting. Make failures point to the operation that went wrong rather than to test harness bookkeeping. - "mm: avoid large folio splits when swap is unavailable" (Johannes Weiner): Avoid splitting large folios merely to attempt swap when no swap space is available. There is little point paying for an expensive split when reclaim cannot actually swap the resulting pages out. - "mm: workingset: fix the shadow node budget under MGLRU" (Hui Zhu): Fix the workingset shadow-node budget with MGLRU enabled. Keep the shadow entries within the intended limits so refault tracking does not quietly consume more metadata than it should. - "selftests/mm: TAP output and global-state fixes" (Song Hu): Fix selftests which produce misleading TAP output or fail to restore global settings after a run. A test ought to leave the system as it found it, particularly when a whole suite follows behind. - "mm: remove page_swap_entry()" (Tal Zussman): Remove page_swap_entry() and convert its remaining users to the folio and swap-entry helpers. Lose an old page-level interface and make the swap paths a little more consistent. - "mm: refactor zonelist constructors and iterators" (Gregory Price): Refactor the zonelist construction and walk helpers to reduce duplicated logic. Keep the allocation ordering rules intact while making it clearer how zones are selected. - "mm: kmemleak: batch the struct page scan" (Breno Leitao): Scan adjacent struct pages in batches instead of taking kmemleak_lock once for every single page. This preserves scan coverage and the lock-hold bound, while cutting overhead substantially on debug kernels. - "mm/damon: misc improvements in tests and documents" (Zenghui Yu): Fix some DAMON selftests which leave kdamond running or fail under Python safe-path mode, and improve the KUnit coverage and documentation. Nothing especially glamorous, but these are worth doing. - "mm/damon: introduce probe_hits_wsum DAMOS core filter" (SJ Park): Add a DAMOS core filter using weighted probe-hit counts. This gives schemes another way to select regions based on what the monitoring probes observed. - "mm/mglru: fix ineffective memory protection for non-kswapd reclaim" (Ridong Chen): Fix MGLRU's memory protection handling for reclaim outside kswapd. The protection settings weren't having the intended effect in these paths, leaving protected memory more exposed than requested. - "mm/damon: improve readability, clarity and test coverage" (SJ Park): Simplify a handful of DAMON core helpers, clarify their behavior and expand test coverage. There are no intended userspace-visible changes in this batch. - "mm: replace PF_KCOMPACTD/PF_KSWAPD with kthread_func()" (Kefeng Wang): Stop identifying reclaim and compaction workers through the PF_KSWAPD and PF_KCOMPACTD task flags. Use their kthread functions instead and remove the redundant flag plumbing. - "mm/hugetlb: fix surplus accounting and availability checks during demotion" (Longlong Xia): Fix HugeTLB surplus accounting and availability checks when demoting huge pages. Keep the counters and reservation decisions consistent as one huge page turns into several smaller ones. - "mm/damon: add kunit tests for probe_hits handling and probe params validation" (Jason Angelov): Add KUnit tests for DAMON probe-hit handling and invalid probe parameters. These cover edge cases that were too easy to miss in ordinary monitoring tests. - "mm/damon: fix misc bugs in kunit, quota goals and sysfs refresh_ms" (SJ Park): Fix a few DAMON bugs in KUnit tests, quota-goal handling and the sysfs refresh interval. Small fixes, but the incorrect results and control behavior were real. - "mm: zswap: optimize zswap invalidate and store" (Kefeng Wang): Simplify zswap's invalidate and store paths to avoid avoidable lookups and work. Keep the entry lifetime rules intact while making those frequent operations cheaper. - "mm: replace custom ratelimiting logic" (Pedro Falcato): Replace hand-rolled MM rate limiting with the common kernel helpers. There is no need to maintain another local version of the same mechanism. - "mm/vmalloc: minor cleanups" (Ye Liu): Tidy some vmalloc initialization and reporting code, and pull duplicated vmap-area insertion work into a helper. No functional changes are intended. - "mm/mglru: clean up isolate_folios for readability and clarity" (Ridong Chen): Clean up MGLRU's isolate_folios() so the decisions are easier to read and verify. Keep reclaim behavior unchanged while removing unnecessary twists in the control flow. - "Catch automatic storage in IDA and Maple Tree definitions" (Yury Norov): Catch IDA and maple-tree definitions placed in automatic storage where the lifetime rules are wrong or easy to get wrong. Add checks so such mistakes are harder to slip through unnoticed. - "mm, swap: some random fixes and cleanups" (Kemeng Shi): Fix and simplify a few unrelated swap paths, removing redundant work and tidying up error handling. A small collection of things which were better fixed than left lying around. - "mm/page_io: folio conversion cleanups" (Tal Zussman): Finish some page-to-folio conversions in swap I/O, removing obsolete wrappers and using folio operations consistently. The I/O behavior is intended to remain the same. - "mm/swap: skip empty clusters in the swapoff scan" (Youngjun Park): Skip empty swap clusters during swapoff instead of walking slots which have nothing to release. This avoids pointless work on sparsely used swap devices. - "mm: trace: decode architecture-specific VMA flags" (Meijing Zhao): Teach the VMA trace output to decode architecture-specific flags, rather than leaving them as unexplained bits. That should make tracing a good deal more useful when debugging unusual mappings. - "mm, swap: don't spin on a bad swap entry" (Breno Leitao): Stop repeatedly retrying a swap entry which is already known to be bad. Make the error path terminate cleanly instead of wasting CPU chasing an entry that cannot be used. - "mm/page_isolation: fix UBSAN shift-out-of-bounds in isolate_single_pageblock" (Qi Xi): Fix an out-of-range shift in isolate_single_pageblock() and tighten its associated boundary handling. UBSAN found the issue; the result should be more robust pageblock isolation. - "mm: khugepaged: fix tracepoint UAF" (Vernon Yang): Fix a use-after-free in khugepaged tracepoint handling. Make sure the information recorded by tracing stays valid for as long as the trace event needs it. - "mm/damon: fix DAMOS bugs in core, paddr and vaddr" (SJ Park): Fix several DAMOS problems across the core and physical- and virtual-address backends. The changes close error cases and bring the implementations back into agreement. - "mm/hugetlb_cgroup: move the per-node usage along with the folio" (Hongfu Li): Move HugeTLB per-node usage accounting when folios migrate between nodes or are reparented to another cgroup. Otherwise numa_stat can retain stale charges and even underflow when the folio is freed. - "docs/core-api: memory-allocation: add k[mz]alloc_obj() and clarify kmalloc" (Mike Rapoport): Document the typed k[mz]alloc_obj() allocation helpers and clear up some kmalloc guidance. Make it easier for callers to choose the right interface. - "selftests/mm: Validate selections and scope memfd_secret setup" (Tianyi Chen): Check selftest selections before running and confine memfd_secret setup to the cases that actually need it. Avoid confusing failures caused by the test harness itself. - "mm/damon: move zero damos quota target_value handling to the core layer" (SJ Park): Handle a zero DAMOS quota goal target in the core rather than making each user of the interface invent its own rule. Keep quota decisions consistent across callers. - "mm/damon: Introduce a huge page collapsing mechanism using auto tuning" (Asier Gutierrez): Add an auto-tuned DAMON mechanism for collapsing huge pages. Use monitoring feedback to decide when collapse is worthwhile rather than forcing one fixed policy onto every workload. - "kmemleak: fix stale documentation and raise the verbose default" (Breno Leitao): Bring the kmemleak documentation up to date and require a third confirming scan before verbose kernels print a suspected leak. The extra scan helps suppress transient false positives in noisy debug builds. - "mm/memory: improve insert_pages() error handling" (Avi Weiss): Tighten insert_pages() error handling so partial failures are reported and cleaned up consistently. The caller should not have to guess how far the operation got. - "mm/damon: allow NULL or unstarted damon_ctx parameter for damon_call()" (SJ Park): Make damon_call() handle NULL and not-yet-started contexts safely. Simplify the rules for callers and avoid an indefinite wait on an invalid state. - "mm/damon: introduce pgidle_set probe filter type" (SJ Park): Add a pgidle_set DAMON probe filter, giving monitoring users another way to select pages by their idle-tracking state. Wire it through the filter interfaces and tests. - "mm/damon/core: remove unused helper functions" (Cheng-Han Wu): Remove DAMON core helpers which no longer have callers. Keep the API surface smaller rather than retaining dead code just in case. - "mm: stop calling pmd_folio() on special PMDs" (Gregory Price): Avoid calling pmd_folio() on special PMD mappings that have no struct page. The old assumption could fault in procfs walkers; use the normal-folio checks and handle those mappings properly. - "mm: remove three unused helpers from mm.h" (Tal Zussman): Remove three unused helpers from mm.h. Fewer obsolete interfaces for the next person to stumble over. - "mm/damon: improvements in efficiency, error handling, documents" (Liew Rui Yan): Skip needless DAMOS quota work once the quota is full, propagate a missing sysfs error and tidy a couple of comments. The ignored error could make a monitoring-start request appear successful when it wasn't. - "docs/mm/damon/design: add explanation of nr_snapshots" (Liew Rui Yan): Explain DAMON's nr_snapshots accounting in the design documentation and straighten out the associated terminology. Make it clearer what users should expect from that counter. - "selftests/cgroup: fixes for test_zswap on single core VM" (Wilson Felipe Pereira): Fix two test_zswap failures on single-CPU VMs. Wait for the exiting child's cgroup to become unpopulated before reconfiguring it, and avoid another test assumption which breaks under constrained scheduling. - "docs/ksm: fix advisor documentation and comment" (Jinjiang Tu): Correct the KSM advisor documentation and a misleading code comment. Keep the description aligned with how the advisor actually works. - "Fix bugs in HugeTLB allocation when mem_cgroup_charge_hugetlb() fails" (Ackerley Tng): Fix HugeTLB allocation cleanup when the memcg charge fails. Make sure failure exits undo what was allocated rather than leaving stale accounting or resources behind. - "mm, memcg: fix memory.peak reset clobbering other fds' watermark" (Ridong Chen): Fix memory.peak reset handling so resetting one file descriptor doesn't overwrite the watermark kept for another. Keep those per-open measurements independent as intended. - "mm: reject zone device folios in more folio walkers" (Gregory Price): Reject zone-device folios in page walkers that cannot safely handle them. Extend the existing checks rather than assuming every folio has ordinary system-memory backing. - "percpu: remove code with no effect" (Sang-Heon Jeon): Remove a few pieces of percpu code which no longer do anything. There is no reason to keep maintaining dead paths. * tag 'mm-stable-2026-10-19-21-33' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: (539 commits) mm: shmem: assign a lock class to the unused huge shrinklist mm: vmscan: put rotation-missed folios at the LRU tail mm: kmemleak: scan the struct page array in MAX_SCAN_SIZE batches mm: kmemleak: move the struct page scan into a helper mm/damon: document that a zero sample_interval is accepted mm/damon: fix typos in comments mm/damon/sysfs: propagate damon_call() error in turn_damon_on mm/damon/core: skip quota score setup when the quota is full mm/damon/tests/core-kunit: test the size charged for a filter-trimmed region mm/damon/core: charge only the part of a region the filter left mm: disallow raw PFN mappings of huge/shared zeropage selftests/mm: zap whole PTE tables in the khugepaged race harness selftests/mm: add memory-pressure threads to the khugepaged race harness selftests/mm: race the collapse of windows with holes selftests/mm: add khugepaged race harness selftests/mm: check that one khugepaged pass collapses one window selftests/mm: run every supported collapse order by default selftests/mm: cover a shared-source collapse write race selftests/mm: parameterize the mixed-source collapse case by source order selftests/mm: add order-parameterized khugepaged collapse cases ...
11 daysMerge tag 'powerpc-7.4-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Madhavan Srinivasan: - powerpc/numa: Support coregroup on PowerNV - powerpc/irq: Move __softirq_pending out of irq_stat - powerpc/512x: Remove pdm360ng platform setup in favor of mpc512x_generic - powerpc/ps3: Simplify control flow in ps3_{virq,irq_plug}_setup() - KVM: PPC: Book3S HV: Add preempt_disable() around virtual-mode HPTE bit-lock users - powerpc/syscall: Avoid atomic test_and_clear_thread_flag on fast path - pseries/plpks cleanup and fixes - Misc fixes and cleanup Thanks to Abhishek Dubey, Amit Machhiwal, Anushree Mathur, Bui Nguyen Nhu Quynh, Christophe Leroy (CS GROUP), Dmitry Torokhov, Gaurav Batra, Gautam Menghani, Geert Uytterhoeven, Greg Joyce, Hari Bathini, Harsh Prateek Bora, Karl Mehltretter, Link Mauve, Michal Suchánek, Mukesh Kumar Chaurasiya (IBM), Nayna Jain, Ritesh Harjani (IBM), R Nageswara Sastry, Saket Kumar Bhaskar, Samir Mulani, Shivang Upadhyay, Shrikanth Hegde, Sourabh Jain, Srikar Dronamraju, Srish Srinivasan, Thorsten Blum, Vaibhav Jain (IBM), Venkat Rao Bagalkote, and Yeswanth Krishna Tellakula * tag 'powerpc-7.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (44 commits) powerpc/numa: Support coregroup on PowerNV powerpc/numa: Allow cpu_to_coregroup_id without PPC_SPLPAR powerpc/numa: Simplify find_primary_domain_index powerpc/fadump: collect dump when CPU_STATE_DATA is less than reserved powerpc/syscall: Avoid atomic test_and_clear_thread_flag on fast path powerpc/kasan: fix r2 corruption in mem*() on GENERIC_ENTRY with old compilers powerpc: fix NMI exit ordering: restore soft masks after irqentry_nmi_exit() powerpc/pseries/iommu: Add TCEs for 16GB pages when RAM is pre-mapped KVM: PPC: Book3S HV: Free the queue pages in error path KVM: PPC: Book3S HV: Add missing mappings for tracing exits powerpc/interrupt: Use early_radix_enabled() in NMI real-mode guard KVM: PPC: Fix get_d_signext() 12-bit displacement for paired-single D-form KVM: PPC: Book3S HV: Add preempt_disable() around virtual-mode HPTE bit-lock users KVM: PPC: Book3S HV: Add SRCU protection for virtual-mode HPT hcalls pseries/plpks: update PKS documentation and MAINTAINERS entry pseries/plpks: rename the default wrapping key macro pseries/plpks: make narrowing conversions explicit pseries/plpks: hide wrapping_features when unsupported pseries/plpks: fix self-reference in plpks_var initializer pseries/plpks: clear SED key data after use ...
11 daysMerge tag 'irq-drivers-2026-10-20' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq chip driver updates from Thomas Gleixner: "Updates for interrupt chip drivers: - Remove the futile attempts to cleanup resources when the probing of the main interrupt chip fails for SiFIVE/PLIC devices. If that probe fails the system will stall immediately afterwards in the boot process without reaching a state where the error could be diagnosed. The lack of resource cleanup led to a frenzy of AI detected/assisted "fixes" which just make the code pretend to be correct for no value. Remove the existing half baked cleanup and immediately panic the machine when the probe fails. That's far more useful than letting it proceed and stall out a millisecond later with no information about the root cause. - A series of fixes for the ARM GIC-V3 driver addressing a potential double free, a bitmask overrun on 32-bit ARM and a OF node leak. - Automatically set the IRQ_DOMAIN_FLAG_DESTROY_GC when a interrupt domain is created that also allocates the generic interrupt chip during domain creation. That removes the requirement for manually setting the flag in the domain creation info structure when it contains a valid entry for allocating the generic interrupt chip. Remove the therefore redundant setters of IRQ_DOMAIN_FLAG_DESTROY_GC in the existing drivers. - Add support for Annapurna Labs FIC version 2 and 3 and implement affinity control for the demultiplexed interrupts by utilizing the recently merged interrupt redirection infrastructure. - Convert the ACPI device ID structures to named initializers - Consolidate the IPI related constants for RISC-V interrupt controllers - Add support for Qualcomm Purwa SoC interrupt chip and consolidate the workaround for the previous version in Hamoa SoCs. - The usual small fixes and improvements all over the place" * tag 'irq-drivers-2026-10-20' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (61 commits) irqchip/al-fic: Support per-child affinity via interrupt redirection irqchip/al-fic: Add support for FIC v3 irqchip/al-fic: Support error and fatal outputs and FIC v2 dt-bindings: interrupt-controller: amazon,al-fic: Add mask selection irqchip/al-fic: Switch to shared parent interrupt irqchip/al-fic: Keep the device_node instead of a cached name string irqchip/al-fic: Use %pOF and raise init log level irqchip/al-fic: Use %pe to print init error irqchip/al-fic: Fix coding style issues irqchip: Use named initializers for acpi_device_id irqchip/gic-v5: Fix standalone IRSes OF probe dt-bindings: interrupt-controller: gicv5: Relax IRS properties constraints irqchip/renesas-rzv2h: Preserve TIEN state in rzv2h_tint_set_type() irqchip/loongson-eiointc: Use pa_to_nid() rather than hard-code irqchip/riscv-imsic: Expose the fwnode via the global config irqchip/meson-gpio: Allow the GPIO interrupts to wake the system irqchip/gic-v3: Ensure change to DS is visible irqchip/mips-gic: Transfer interrupt mask state across clusters irqchip/mips-gic: Fix recursive acquisition of gic_lock in gic_set_affinity() irqchip/mips-gic: Fix unbalanced cm_core_lock in for_each_online_cpu_gic() ...
12 daysMerge tag 'docs-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/docs/linuxLinus Torvalds
Pull documentation updates from Jonathan Corbet: "It was a reasonably busy cycle for docs; changes include: - Add the AGENTS.md symbolic link into the top-level directory in the hopes that LLMs will read it and produce better work - The removal of the Assisted-by requirement, as concluded at the Maintainer Summit - A new "testdocs" make target to run the documentation unit tests - Lots of work on the Portuguese, and Chinese translations; there is now maintenance for the traditional Chinese translations as well ...and the usual pile of minor fixes, documentation updates, etc" * tag 'docs-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/docs/linux: (125 commits) docs: add AGENTS.md as a symlink to README docs: kernel-parameters: adjust reserve_mem build option docs: kernel-parameters: don't mix cmdline options & build options docs/ja_JP: translate submitting-patches.rst (review and report tags) docs: remove Assisted-by references Revert "docs: landlock: fix ENOMSG condition in create_ruleset kernel-doc" docs: kdoc: parse context_lock_struct() as struct declaration docs: timers: hpet: Document userspace API and ioctl commands docs: timers: hpet: Modernize file references Documentation: sched-preemption: Add a SPDX license identifier docs: ABI: sysfs-driver-xdata: use literal blocks for console commands docs: ABI: sysfs-class-firmware-attributes: use literal blocks for console commands ABI: sysfs-bus-usb: use literal block for console commands docs/ABI: testing: aspeed-uart-routing: use literal block for console commands docs: kernel-parameters: fix a truncated sentence for preempt=lazy sched/doc: add a preemption model overview docs: ABI: TMR manager: use literal blocks for console I/O Documentation/ABI: IFS: use literal blocks for commands ABI: sysfs-bus-pci: use literal blocks for commands docs: translations: pt_BR: add debugging index ...
12 daysMerge tag 'x86_tdx_for_7.4-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 TDX updates from Dave Hansen: "There are two high-level things going on here. First, TDX host systems currently consume ~0.4% of physical memory for their own memory metadata. This is all-or-nothing; you either pay the 0.4% or can not use TDX. A new TDX module feature (Dynamic PAMT) allows this metadata to be allocated for 2MB of host memory at a time. This, of course, saves precious DRAM when TDX utilization is low on a host. Second, the TDX ABI has fixed-size "quotes" that are passed around during attestation operations. These 128k buffers are far too small for post-quantum cryptography where the quotes grow substantially. The TDX module now has the ability to enumerate the sizes of the quote buffers. Plumb the new size enumeration into the kernel" * tag 'x86_tdx_for_7.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: virt: tdx-guest: Make the Quote buffer size dynamic x86/tdx: Add a helper to query maximum Quote size virt: tdx-guest: Add a helper for the Quote buffer size virt: tdx-guest: Calculate the Quote buffer size safely virt: tdx-guest: Give the Quote buffer an explicit type x86/tdx: Take the Quote buffer as a generic pointer x86/tdx: Restrict attestation exports to the tdx-guest driver virt: tdx-guest: Remove unused and confusing function argument x86/virt/tdx: Formalize SEAMCALL leaf version encoding support Documentation/x86: Add documentation for TDX's Dynamic PAMT x86/virt/tdx: Enable Dynamic PAMT KVM/TDX: Get/put PAMT pages when (un)mapping private memory x86/virt/tdx: Add APIs to support Dynamic PAMT ops from KVM's fault path KVM/TDX: Allocate PAMT memory for TD and vCPU control structures x86/virt/tdx: Handle multiple callers in tdx_pamt_get/put() x86/virt/tdx: Allocate refcounts for Dynamic PAMT memory x86/virt/tdx: Add __tdx_pamt_get/put() helpers x86/virt/tdx: Allocate page bitmap for Dynamic PAMT x86/virt/tdx: Simplify PAMT layout calculation
12 daysMerge tag 'x86_fpu_for_v7.4_rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 FPU state updates from Borislav Petkov: - Document and cleanup the signal frame handling with the goal to allow process migration between CPUs with different FPU capabilities but which use only a common set of FPU features, i.e., think checkpoint/restore (Andrei Vagin) - Consolidate how XSTATE features are checked by doing them once during boot with the intent of removing cpu_has_xfeatures(). Latter will happen in the next cycle (Eric Biggers) - Other cleanups * tag 'x86_fpu_for_v7.4_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/fpu: Remove additional remnants of math emulation x86/fpu: Remove unnecessary checks for X86_FEATURE_FPU selftests/x86: Add tests for signal frame FPU portability x86/fpu: Pre-fault only required size of xstate buffer x86/fpu: Fix potential underflow in xstate_calculate_size() x86/fpu: Document reasoning of FX-only fallback x86/fpu: Extract restore_from_ia32_fxstate() and clean up fpu__restore_sig() x86/fpu: Clean up and rename variables in signal frame handling x86/fpu: Document signal frame layout and portability xor: Add AVX-512 optimized xor_gen() xor: Remove redundant X86_FEATURE_OSXSAVE check lib/crc: x86: Stop using cpu_has_xfeatures() lib/crypto: x86: Stop using cpu_has_xfeatures() crypto: x86 - Stop using cpu_has_xfeatures() um: Check for missing AVX and AVX-512 xstate bits x86/fpu: Check for missing AVX and AVX-512 xstate bits
13 daysMerge tag 'arm64-upstream' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: "Here are the arm64 updates for 7.4. The more interesting bits are the removal of big-endian kernel support (already marked BROKEN for some time), preemptible this_cpu_*() operations and MPAM support for the firmware-backed (Fb) interface. CCA (Arm's confidential compute) is slowly trickling in with host RMI (Realm Management Interface) support and some refactoring, including a dedicated SMCCC bus to advertise firmware services. There are also the usual PMU updates for new hardware and a few fixes/cleanups. Core features: - Remove big-endian kernel support: CONFIG_CPU_BIG_ENDIAN has depended on BROKEN for a while, so drop the remaining code (BE hypervisor object, BPF JIT, assembly/crypto/library routines, endianness helper macros, selftests) and force a little-endian build - Add preemptible this_cpu_*() operations (read/write, RMW, xchg, cmpxchg and cmpxchg128) that no longer need to disable preemption around the per-CPU address generation and access - Preparation patches for implementing CONFIG_HOTPLUG_PARALLEL on arm64 Memory management: - Treat faults taken by EFI runtime firmware as kernel faults - Clear PTE_WRITE for EFI_MEMORY_RO mappings (with hardware dirty state management enabled, this is not truly read-only) - Raise the default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA configurations (28/26/24 bits for 4K/16K/64K pages) - Implement clear_page[s]() using memset() - Enable BBML2 no-abort (a.k.a. BBML3) for the NVIDIA Rigel CPU Perf and PMU: - Support for HiSilicon's ITS PMU - Add support for some new events: INST_SIMD_ALU_VEC for Apple PMUs and a cycle counter for the latest version of HiSilicon's MN PMU hardware - A bunch of fixes to the CXL PMU driver to address pre-existing issues from Sashiko - Fix generation of PERF_RECORD_ITRACE_START records for SPE and ETM drivers - Reduce excessive stack consumption in the Marvell DDR PMU driver - Minor driver updates and cleanups all over Arm Confidential Compute Architecture (CCA): - Add an Arm SMCCC bus for firmware services discovered through SMCCC and move the TRNG and CCA guest (TSM provider) drivers onto it, removing the dummy CCA platform device and adding a sysfs ABI for Realm guests - Move the Realm Service Interface (RSI) code out of arch/arm64/ into drivers/firmware/arm_rmm/ - Add the host side of the Realm Management Interface (RMI): detect, configure and activate the RMM, add SRO support and wrappers for the Realm RMI commands - Block hibernation (new arch hook in the PM core) and kexec while the RMM is active. To be revisited in the future with proper support for deactivation - Handle Granule Protection Faults (GPFs) taken by the host, caused by accesses to memory delegated to the RMM. In a future patch, the exception table lookup will be limited to is_kdump_kernel() cases MPAM (Memory Partitioning And Monitoring): - Add support for the MPAM firmware-backed (Fb) interface, allowing MSC accesses to be mediated by firmware - Fix a list of theoretical issues with the driver (MSC access error propagation, MBWU monitor save/restore and locking, resctrl class handling, error interrupt restore, maximum number of PARTIDs) - Add the mailing list and a missing file to the MAINTAINERS entry - Document when to set arm64.nompam Errata and CPU features: - Add the NXP i.MX8QM/8QP workaround for the Cortex-A53 cache coherency issue (ERR050104), using a new ARM64_CPUCAP_SOC_ERRATUM capability type for SoC-level errata Miscellaneous: - Mask debug exceptions (DAIF) around the hardware breakpoint register manipulations when called from generic kernel code - Don't zero the SVE state buffer when the SVE state is live - Return -EPERM instead of -EBUSY from the GCS prctl() locking failures (matching x86), with the selftest updated. Slight ABI change but no software deployment yet - kselftest: fix unsound MTE fault skipping by introducing MTE-safe memory accessors, avoid copying each signal test binary more than once - Update sysreg definitions (fix three enum values and two field names, mark architecturally dropped fields as RES0) and remove the TME transaction state check from the BRBE driver - Fix the description of ARM64_HAS_LPA2 and remove a redundant ID_AA64MMFR0 define" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (144 commits) arm64: cpufeature: Enable BBML2 for NVIDIA Rigel arm64: cputype: Add NVIDIA Rigel definitions arm64: raise default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA arm64/debug: mask debug exceptions when called from common code kselftest/arm64: signal: copy each test binary only once kselftest/arm64: Check for -EPERM not -EBUSY in the locking test arm64: gcs: Return -EPERM not -EBUSY for prctl() locking failures perf: arm_brbe: Remove the check for TME transaction states arm64: sysreg: Mark fields the architecture dropped as RES0 arm64: sysreg: Fix the names of two misspelt fields arm64: sysreg: Fix three incorrect enum values arm64: smp: Defer RCU registration during secondary CPU bringup arm64: smp: Don't bother printing the I-cache policy for each CPU arm64: smp: Defer update of secondary CPU capabilities arm64: smp: Tidy up cpuinfo init and cpufeature updates arm64: smp: Tidy up smp_prepare_cpus() arm64: cpufeature: Store every ID register with its overrides applied arm64: cpufeature: Read MPAMIDR_EL1 in __cpuinfo_store_cpu() arm64: cpufeature: Add read_cpuid_with_overrides() arm64: cpufeature: Check arm64_ftr_regs[] before the first store ...
13 daysMerge branches 'apple/dart', 'arm/smmu/updates', 'arm/smmu/bindings', ↵Joerg Roedel
'hyper-v', 'samsung/exynos', 'riscv', 'broadcom', 'intel/vt-d', 'amd/amd-vi' and 'core' into next
2026-10-16platform/x86/amd/hsmp: Document and expose client telemetry table in UAPIMuralidhara M K
Add struct hsmp_telemetry_table_rm to the UAPI header, describing the Ryzen Master SMC telemetry table (table version 5, as reported by HSMP_CLIENT_GET_METRICS_TABLE_VER) returned by HSMP_CLIENT_GET_METRICS_TABLE on the Family 1Ah client models, now that the previous commit wires that message up to a usable DRAM mapping. Point amd_hsmp.rst at struct hsmp_telemetry_table_rm instead of duplicating the layout in prose. The Public PPR for the model in use remains the reference for units and encodings. Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Link: https://patch.msgid.link/20261012085407.1202295-5-muralidhara.mk@amd.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-10-16platform/x86/amd/hsmp: Add HSMP client support for Family 1AhMuralidhara M K
Add HSMP client support for the Family 1Ah client platforms, Models 80h-8Fh and E0h-E3h, recognized by the previous commit via is_client_platform(). These parts speak the Ryzen Master SMC (RMSMC) message set instead of the server HSMP messages, and probe via ACPI _CRS/_DSD like a server socket. Add the client message set to the UAPI header. Introduce struct hsmp_plat_desc to select the test message and protocol-version message at runtime, based on is_client_platform() rather than a fixed set of family/model ranges. The client set has no per-message descriptor table. validate_message() and hsmp_ioctl_msg() therefore skip msg_id range validation and the /dev/hsmp GET/SET fd-mode gate for client messages, leaving msg_id validity to firmware's response status; validate_message() still bounds client num_args and response_sz to HSMP_CLIENT_MAX_MSG_LEN. Server platforms keep every check, and get_msg_desc() now also enforces a lower msg_id bound there. get_msg_desc() sanitizes msg_id with array_index_nospec() against its own num_msgs bound before indexing the descriptor table, rather than depending on a caller-side clamp. Add hsmp_msg_response_sz(), returning the descriptor table entry on server and the client protocol max otherwise, used by hsmp_cache_proto_ver() since firmware returns only args[0] for client. validate_message() and hsmp_ioctl_msg() distinguish the two sets via the already-resolved hsmp_plat_desc/hsmp_msg_desc pointers, not a second is_client_platform() call. The /dev/hsmp 0600 restriction and every sysfs/hwmon attribute hidden on client platforms stay from the previous commit: hsmp_ioctl_msg() still has no GET/SET gate for client messages, so an unprivileged opener could otherwise issue destructive SET messages, and the hidden attributes still resolve against unrelated client commands. Lifting either restriction is deferred to the commits that make the corresponding client functionality safe to expose. Document the client models in amd_hsmp.rst. Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Link: https://patch.msgid.link/20261012085407.1202295-3-muralidhara.mk@amd.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-10-15Merge branches 'for-next/misc', 'for-next/be-gone', 'for-next/smccc-bus', ↵Catalin Marinas
'for-next/preemptible-this-cpu', 'for-next/cpu-errata', 'for-next/mpam', 'for-next/kselftest', 'for-next/efi', 'for-next/secondary-boot-prep', 'for-next/sysreg' and 'for-next/gcs', remote-tracking branch 'arm64/for-next/perf' into for-next/core * arm64/for-next/perf: (22 commits) drivers/perf: apple_m1: Add macOS 27 M2 Event perf/marvell: cn10k_tad: Publish the OF module alias perf: xgene: initialize lock before requesting IRQ perf: marvell: avoid large stack variables perf/dwc_pcie: Fix PCI device reference leak in probe coresight: perf: Suppress ITRACE start records perf: arm_spe: Suppress redundant ITRACE start records perf/core: Export perf_event_itrace_started() perf/cxl: Clear stale overflow status before using a counter perf/cxl: Don't log through pmu.dev in the overflow interrupt handler perf/cxl: Validate the hardware-reported counter width perf/cxl: Unfreeze counters after handling an overflow interrupt perf/cxl: Don't share the overflow interrupt, and keep it pinned cxl/pci: Add the PMUs after configuring events perf/cxl: Split the MSI vector out of info->irq perf/cxl: Accept an overflow interrupt on MSI message number 0 perf/cxl: Fix the counter overflow delta fixup perf/cxl: Clear stale event fields before reprogramming a counter perf/cxl: Program the requested event group on configurable counters drivers/perf: hisi: Add cycle event for new MN PMU ... * for-next/misc: arm64: cpufeature: Enable BBML2 for NVIDIA Rigel arm64: cputype: Add NVIDIA Rigel definitions arm64: raise default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA arm64/debug: mask debug exceptions when called from common code arm64: clear_page[s] using memset arm64/sve: Don't zero the SVE state buffer when the SVE state is live arm64/cpufeature: Drop redundant define(ID_AA64MMFR0..._SUPPORTED_LPA2) arm64: Use proper include variant arm64: include: fix repeated word 'to' in comment selftests: arm64: fix typo "hander" in comment arm64: fix typos in comments docs: arm64: Fix typo "initalised" in booting.rst arm64: alternative: Remove 'cfg' parameter arm64: mte-kasan: Use IS_ENABLED() rather than ALTERNATIVE() 'cfg' parameter arm64/cpufeature: Change description for ARM64_HAS_LPA2 * for-next/be-gone: drivers: Kconfig: Simplify dependencies on ARM64 && !CPU_BIG_ENDIAN arm64: Kbuild: Remove vestigial big-endian support gve: Add explicit ARM64 dependency to Kconfig crypto: hisilicon/sec2: Remove check of CONFIG_CPU_LITTLE_ENDIAN arm64: Remove all usage of __AARCH64EB__ arm64: Remove all usage of CONFIG_CPU_BIG_ENDIAN KVM: arm64: Remove support for a big-endian hypervisor object arm64: vdso32: Always build compat vDSO object as little-endian arm64: assembler: Remove endianness helper macros arm64: lib: Assume a little-endian kernel in optimised string routines arm64: lib: Assume a little-endian kernel in custom library routines arm64: crypto: Assume a little-endian kernel arm64: bpf: Remove big-endian support from the JIT compiler selftests/arm64: Remove big-endian support * for-next/smccc-bus: : Switch Arm SMCCC firmware services to an SMCCC bus arm64: rsi: Correct type of realm_config::hash_algo firmware: smccc: Pass only the required device probe arguments firmware: arm_rmm: Add SPDX and sort the Kconfig and Makefile entries coco: guest: arm64: Remove dummy CCA platform device coco: guest: arm64: Add sysfs ABI for CCA Realm guests firmware: smccc: arm-cca-guest: Bind the TSM provider to an SMCCC device virt: coco: arm-cca-guest: Rename TSM report source file arm64: realm: Move Realm memory encryption ops to RSI code firmware: arm_rmm: Move RSI support out of arch/arm64 firmware: hwrng: arm_smccc_trng: Register as an SMCCC device firmware: smccc: Add an Arm SMCCC bus * for-next/preemptible-this-cpu: : Preemptible this_cpu_*() operations arm64: percpu: Remove _pcp_protect*() wrappers arm64: percpu: Implement preemptible CMPXCHG128 ops arm64: percpu: Implement preemptible CMPXCHG ops arm64: percpu: Implement preemptible XCHG ops arm64: percpu: Implement preemptible return RMW ops arm64: percpu: Implement preemptible void RMW ops arm64: percpu: Implement preemptible read/write ops arm64: percpu: Add infrastructure for preemptible this_cpu_*() ops arm64: entry: sdei: Make 'tsk' available arm64: entry: sdei: Restore all clobberable GPRs arm64: gpr-num: add __GPR_NUM() helper arm64: gpr-num: Add wxN aliases for wN registers arm64: percpu: Factor out percpu offset asm arm64: ptrace: Always inline pt_regs_{read,write}_reg() arm64: preempt: Treat should_resched() as unlikely arm64: preempt: Simplify and optimize __preempt_count_dec_and_test() arm64: cmpxchg128: LSE: Remove redundant operands arm64: cmpxchg: LL/SC: Avoid redundant extension * for-next/cpu-errata: : Various CPU errata workarounds arm64: errata: Add NXP i.MX8QM/8QP workaround for A53 cache coherency issue arm64: cpufeature: Add ARM64_CPUCAP_SOC_ERRATUM for SoC-level errata * for-next/mpam: (30 commits) : MPAM updates arm_mpam: make the mon_sel guard conditional only arm_mpam: On saving mbwu state read the monitors before clearing CFG_MBWU_CTL arm_mpam: detect and enable MPAM-Fb PCC support arm_mpam: change MPAM-Fb error IRQ to use a threaded IRQ handler arm_mpam: add MPAM-Fb MSC firmware access support arm_mpam: prepare mon_sel locking for MPAM-Fb arm_mpam: propagate MSC access errors in mpam_reset_class_locked() arm_mpam: propagate MSC access errors for interrupt control arm_mpam: propagate MSC access errors for mpam_reprogram_ris_partid() arm_mpam: propagate MSC access errors for state saving function arm_mpam: propagate MSC access errors for __ris_msmon_read() arm_mpam: propagate MSC access errors for msmon helpers arm_mpam: propagate MSC access errors for MBWU counters arm_mpam: propagate MSC access errors for hw_probe functions arm_mpam: let low level MSC accessors return an error MAINTAINERS: Use linux-arm-kernel list for the MPAM driver MAINTAINERS: Add mpam.rst to the MPAM DRIVER entry arm_mpam: resctrl: Don't stop early when tearing down a class arm_mpam: Switch to kvzmalloc_objs() for allocation of component cfg arm_mpam: Don't loop forever if there is the maximum possible amount of PARTIDs ... * for-next/kselftest: : arm64 kselftest updates kselftest/arm64: signal: copy each test binary only once kselftest/arm64/mte: Use MTE safe memory accessors kselftest/arm64/mte: Introduce MTE safe memory accessors kselftest/arm64: Extend gcs-locking to cover cases where enable is unlocked * for-next/efi: : arm64 EFI updates/fixes arm64/mm: Treat faults taken by EFI runtime firmware as kernel faults arm64/efi: Clear PTE_WRITE when applying EFI_MEMORY_RO * for-next/secondary-boot-prep: : cpuinfo cleanup in preparation for parallel secondary bring-up arm64: smp: Defer RCU registration during secondary CPU bringup arm64: smp: Don't bother printing the I-cache policy for each CPU arm64: smp: Defer update of secondary CPU capabilities arm64: smp: Tidy up cpuinfo init and cpufeature updates arm64: smp: Tidy up smp_prepare_cpus() arm64: cpufeature: Store every ID register with its overrides applied arm64: cpufeature: Read MPAMIDR_EL1 in __cpuinfo_store_cpu() arm64: cpufeature: Add read_cpuid_with_overrides() arm64: cpufeature: Check arm64_ftr_regs[] before the first store * for-next/sysreg: : sysreg updates perf: arm_brbe: Remove the check for TME transaction states arm64: sysreg: Mark fields the architecture dropped as RES0 arm64: sysreg: Fix the names of two misspelt fields arm64: sysreg: Fix three incorrect enum values * for-next/gcs: : GCS updates/fixes kselftest/arm64: Check for -EPERM not -EBUSY in the locking test arm64: gcs: Return -EPERM not -EBUSY for prctl() locking failures
2026-10-12arm64: errata: Add NXP i.MX8QM/8QP workaround for A53 cache coherency issuePeng Fan
According to NXP errata document IMX8_1N94W[1], the i.MX8QuadMax and i.MX8QuadPlus SoCs suffer from a cache coherency issue (ERR050104). The upper bits, above bit 35, of the ARADDR and ACADDR buses within the Arm A53 subsystem have been incorrectly connected. This causes some TLBI and IC maintenance operations exchanged between the A53 and A72 core clusters to be corrupted. The workaround requires: - Downgrading targeted TLBI operations to broadcast-all variants. Instead of patching the low-level __TLBI_1 macro (which causes excessive over-invalidation), redirect high-level TLB flush functions (flush_tlb_mm, __do_flush_tlb_range, flush_tlb_kernel_range, __flush_tlb_kernel_pgtable) to use VMALLE1IS via alternatives. - Upgrading IC IVAU to IC IALLUIS for both kernel (via ALTERNATIVE in invalidate_icache_by_line) and EL0 userspace (via trap-and-upgrade in user_cache_maint_handler with SCTLR_EL1.UCI=0). - Disabling KVM since correct TLB maintenance cannot be guaranteed for guests. - No need to touch SMMU Broadcast TLB Maintenance (BTM) since the arm-smmu driver does not use it. SoC detection uses devicetree compatible string "fsl,imx8qm" or "fsl,imx8qp" since the boot CPU MIDR_EL1 (0x410fd034) and AIDR_EL1 (0) are not unique to these SoCs. [1] https://www.nxp.com/docs/en/errata/IMX8_1N94W.pdf [ Reworked per review feedback from Will Deacon and Mark Rutland: - Move TLBI workaround from __TLBI_1 macro to high-level flush functions to avoid excessive over-invalidation - Add kernel IC IVAU upgrade via ALTERNATIVE in assembler.h - Add cpucap_is_possible() entry for compile-time elimination] Tested-by: Franz Schnyder <franz.schnyder@toradex.com> # Toradex Apalis iMX8QM Co-developed-by: Ivan T. Ivanov <iivanov@suse.de> Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> [catalin.marinas@arm.com: Kconfig and errata text, sysreg_clear_set(), of_machine_compatible_match()] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2026-10-08Documentation/mm: update DAX vmemmap deduplication docsMuchun Song
Device DAX now uses the common per-zone shared tail page for vmemmap deduplication. The old documentation still described a DAX-specific layout with a separately populated tail vmemmap page and half the HugeTLB savings. Update the generic and powerpc documentation to describe the shared layout. In the powerpc document, keep the radix and 64K-specific details, drop the duplicated 4K PUD arithmetic, and replace the repeated device-dax diagrams with a single parameterized PMD/PUD diagram. Link: https://lore.kernel.org/20260930140627.57431-13-songmuchun@bytedance.com Signed-off-by: Muchun Song <muchun.song@linux.dev> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Acked-by: Qi Zheng <qi.zheng@linux.dev> Acked-by: David Hildenbrand (Arm) <david@kernel.org> Cc: Oscar Salvador <osalvador@suse.de> Cc: Madhavan Srinivasan <maddy@linux.ibm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lorenzo Stoakes <ljs@kernel.org> Cc: Mike Rapoport <rppt@kernel.org> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Christophe Leroy <chleroy@kernel.org> Cc: Ritesh Harjani (IBM) <ritesh.list@gmail.com> Cc: Shrikanth Hegde <sshegde@linux.ibm.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Lance Yang <lance.yang@linux.dev>
2026-10-08riscv: Add Zic64b to cpufeature and hwprobeQingwei Hu
Zic64b mandates 64-byte naturally aligned cache blocks and is a mandatory extension of the RVA22 and RVA23 profiles. Allocate a RISCV_ISA_EXT_ZIC64B id, parse "zic64b" from the ISA string with a validate callback that requires each cbom/cbop/cboz cache block size to be 64 bytes when it is present, and export it through hwprobe. Link: https://lists.riscv.org/g/tech-unprivileged/topic/question_about_zic64b_and/119631059 Reviewed-by: Andrew Jones <andrew.jones@oss.qualcomm.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Qingwei Hu <qingwei.hu@bytedance.com> Co-developed-by: Guodong Xu <guodong.xu@oss.qualcomm.com> Signed-off-by: Guodong Xu <guodong.xu@oss.qualcomm.com> Link: https://patch.msgid.link/20260920-rva23u64-hwprobe-v2-v8-4-5f14bc5c23d3@oss.qualcomm.com [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-10-08riscv: Add B to hwcap and hwprobeAndrew Jones
Add B to hwcap and ensure when B is present that Zba, Zbb, and Zbs are all set. Also expose B via hwprobe (RISCV_HWPROBE_EXT_B in RISCV_HWPROBE_KEY_IMA_EXT_1) so that userspace can probe B directly, mirroring the F/D/C/V pattern where each is reported via both hwcap and hwprobe. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com> [guodong.xu: Add B to hwprobe] Signed-off-by: Guodong Xu <guodong.xu@oss.qualcomm.com> Link: https://patch.msgid.link/20260920-rva23u64-hwprobe-v2-v8-1-5f14bc5c23d3@oss.qualcomm.com [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-10-04iommu/arm-smmu-v3: Handle ARM erratum for CONT under invalidation with SVAJason Gunthorpe
The erratum (MMU-700: #3777127, S3: #3673557) deals with under invalidation of a CONT PTE grouping in the SMMU. The recommended work around is to use a range invalidation that spans the entire CONT. The only user of CONT in the kernel right now is through SVA sharing a CPU page table that contains a CONT created by the mm. Previously it was thought that this errata was dealt with because the driver always uses range invalidation. However, there is a subtle detail in the errata that the invalidation range must fully enclose the entire CONT for it to work. It seems that two sequential range invalidations, with a split point falling inside a CONT grouping, will not prevent the errata. The SMMU's range invalidation generation algorithm does not produce a single invalidation for a single SVA invalidation request, nor does the mm carefully align the SVA invalidation ranges to accommodate the splitting of the invalidation into several ranges. Thus, when processing a SVA invalidation, the range invalidation splitting routine can generate a range invalidation that is split in the middle of the CONT and risk under invalidation from this errata. This condition could be triggered by a malicious userspace manipulating the TLB gathers via mmap/mprotect/munmap. Update the errata list to the include the S3 variation, detect the IOMMUs that have it, and then have SVA invalidations use a simplified version of the over invalidation algorithm from the tlbi rework series. This ensures that a single range invalidation is issued for a single MMU notifier callback and now the range invalidation is guarenteed to cover any posible CONT. Future work to add CONT to iommu_domain page tables should either use this one-invalidate/one-range invalidation algorithm or disable CONT support in the iommu_domain. Cc: stable@vger.kernel.org Cc: Vijayanand Jitta <vijayanand.jitta@oss.qualcomm.com> Fixes: 3f1ce8e85ee0 ("iommu/arm-smmu-v3: Share process page tables") Reviewed-by: Mostafa Saleh <smostafa@google.com> Reviewed-by: Pranjal Shrivastava <peaan@google.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Tested-by: Pranjal Shrivastava <praan@google.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-10-03Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "Half of this is broken hardware (AMU counters and TLB invalidation) and the other half is broken software (frequency scaling and signals). So it seems as though we're all as bad as each other. The AMU workaround is a little noisy, as it refactors an existing workaround so that it can more easily be applied to additional CPUs. Summary: - Fix handling of CPU erratum #2645198 when batching pte updates - Fix truncation of CPU frequency calculation by using 64-bit arithmetic in arch_freq_get_on_cpu() - Work around AMU erratum #3821522 on Cortex-A725 - Fix panic when trying to restore an SVE sigframe on a CPU that only supports SME" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64/fpsimd: signal: Forbid non-streaming SVE payload on SME-only systems arm64: errata: Add Cortex-A725 erratum 3821522 workaround arm64: errata: Factor out broken AMU const counter cap arm64: topology: fix arch_freq_get_on_cpu() overflow above 4.19 GHz arm64: mm: Fix the break-before-make flush range for erratum 2645198
2026-10-01arm64: mpam: Document when to set arm64.nompamFuad Tabba
arm64.nompam skips the MPAM2_EL2 and MPAMHCR_EL2 writes in finalise_el2_state and leaves the ARM64_MPAM cpucap unset. Where EL3 firmware has cleared MPAM3_EL3.TRAPLOWER, the EL2 trap controls are left unwritten, at reset values that are UNKNOWN, and KVM still hides MPAM from the guest but no longer enables the traps that stop a guest from using it. KVM never saves or restores MPAM0_EL1, MPAM1_EL1 and MPAMSM_EL1, so what one guest writes reaches the next guest and the host. Nor can the kernel make the EL2 writes unconditionally: they trap to EL3 on the firmware the option exists for, and TRAPLOWER cannot be read below EL3. Say so in mpam.rst, and add the rule and a pointer to the kernel-parameters entry. Suggested-by: Ben Horgan <ben.horgan@arm.com> Link: https://lore.kernel.org/all/CA+EHjTxeWxZiuSmnKLGLxTBXP4oJT7-LuffbPAyCSZZ5TW=5Ew@mail.gmail.com/ Reviewed-by: Bradley Morgan <brads@mainlining.org> Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev> Reviewed-by: Ben Horgan <ben.horgan@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2026-10-01arm64: errata: Add Cortex-A725 erratum 3821522 workaroundBeata Michalska
Cortex-A725 erratum 3821522 affects the CNT_CYCLES event, which can incur a significant increment error when a CPU enters and subsequently exits WFE or WFI, and may no longer track the system counter frequency. The AMEVCNTR01_EL0 counter is used as the AMU constant counter for frequency invariance and CPPC FFH feedback counters. Wire the affected Cortex-A725 range into the shared broken AMU constant-counter capability so the affected counter is treated as unavailable by returning zero in the AMU counter paths. This prevents the broken counter from being used as a reference source. The erratum can also affect PMUv3 users of the CNT_CYCLES event, but this workaround intentionally does not change PMU event handling. Hiding or rejecting the PMU event from the erratum code would change the perf-visible PMU event interface, including raw event selection, and would need a separate PMU-specific approach rather than being folded into the AMU reference-counter workaround. Cc: stable@vger.kernel.org Signed-off-by: Beata Michalska <beata.michalska@arm.com> Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-09-29pseries/plpks: update PKS documentation and MAINTAINERS entrySrish Srinivasan
Wrap long PKS hcall return-value lines consistently and fix a typo in the H_PKS_UNWRAP_OBJECT description. Also update the MAINTAINERS entry from KEYS-TRUSTED-PLPKS to KEYS-TRUSTED-PKWM to reflect the PowerVM Key Wrapping Module naming. Signed-off-by: Srish Srinivasan <ssrish@linux.ibm.com> Tested-by: R Nageswara Sastry <rnsastry@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20260923182816.151451-13-ssrish@linux.ibm.com
2026-09-25x86/fpu: Document signal frame layout and portabilityAndrei Vagin
The x86 signal frame is designed to be self-describing, with the 'xstate_size' field in the software-reserved bytes indicating the actual size of the context. This design is required for portability, allowing a signal frame created on a system with a specific set of xstate features to be restored on a machine with a different (larger) set of features. Signed-off-by: Andrei Vagin <avagin@google.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Alexander Mikhalitsyn <alexander@mihalicyn.com> Link: https://patch.msgid.link/20260925162454.1403405-2-avagin@google.com
2026-09-25Merge tag 's390-7.3-4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 fixes from Heiko Carstens: - Fix several bugs in PCI error recovery SCLP reporting: don't report success on skipped recovery, report errors when no pdev is associated, add missing device lock, and fix struct pci_dev reference leak in zpci_report_status() - Fix several bugs in CIO code: fix use of invalid SCHIB data, guard PMCW field accesses, check device number valid bit in PMWC before accessing other fields, and fix NULL pointer dereference in ccw_device_get_util_str() - Fix virtual vs physical address confusion in channel measurement facility code on kernels with CONFIG_RANDOMIZE_IDENTITY_BASE=y - Fix couple of bugs in s390dbf: fix copy of failed static debug areas, skip view registration on failure, and reject NULL pointer in debug_dump() - Fix sriov_numvfs attribute name in zPCI documentation - Fix typos in comments * tag 's390-7.3-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/cio: Fix NULL pointer dereference in ccw_device_get_util_str() s390/debug: Fix NULL pointer dereference in debug_info_copy() s390/debug: Do not register views for failed static debug areas s390/debug: Reject NULL debug info in debug_dump() s390/cmf: Fix virtual vs physical address confusion s390/pci: Don't report recovery success on skipped recovery s390/pci: Report SCLP status on error events when no pdev is associated s390/pci: Fix missing device lock in zpci_report_status() s390/pci: Fix leak of struct pci_dev reference in zpci_report_status() s390/cio: Guard PMCW field accesses with dnv check s390/cio: Check pmcw.dnv before pmcw.ena in I/O entry points s390/cio: Fix cio_update_schib() to not cache invalid schib s390/pci/docs: Fix sriov_numvfs attribute name s390: Fix typos in comments
2026-09-24Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: - Fix the recently merged user ABI for the Arm CMN PMU driver filtering logic so that the ordering matches the hardware spec - Fix spurious warning when attempting to read PROT_NONE mappings of /dev/mem - Allow WFxT to be disabled on the command line, which is necessary for some configurations of recent Apple SoCs - Fix EL2 fine-grained trap configuration for the CPU PMU - Fix MIDR matching when applying CPU errata workarounds in a VM * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64/boot: Disable trapping of PMZR_EL0 writes to EL2 arm64: errata: match the target implementation CPU's own MIDR arm64: Add override for WFxT arm64: io: Reject non-user protection in ioremap_prot() perf/arm-cmn: Fix multi-filter encoding
2026-09-23docs: arm64: Fix typo "initalised" in booting.rstHemanth Selam
Add the missing "i" to "initalised" in the description of the spin-table cpu-release-addr property. The British spelling is deliberate. doc-guide/contributing.rst asks that both American and British spellings be left alone, so only the typo is corrected, not the dialect. checkpatch.pl suggests "initialized" here because scripts/spelling.txt maps this entry to the American form; that is addressed separately. Assisted-by: Cursor:claude-opus-5 Signed-off-by: Hemanth Selam <hemanth.selam@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2026-09-23arm64/boot: Disable trapping of PMZR_EL0 writes to EL2Fuad Tabba
__init_el2_fgt2() writes one mask to both HDFGRTR2_EL2 and HDFGWTR2_EL2. PMZR_EL0 is write-only, so its trap bit, nPMZR_EL0, exists only in HDFGWTR2_EL2 and is therefore never set: a PMZR_EL0 write from the host traps to EL2, where the nVHE hypervisor has no handler and BUG()s. The kernel never writes PMZR_EL0, but kernel.perf_user_access=1 has the PMU driver set PMUSERENR_EL0.UEN for a task with a user-read event, so a write from EL0 reaches the trap and takes the host down without a panic message. Accumulate the HDFGWTR2_EL2 bits separately, as __init_el2_fgt() already does for HDFGWTR_EL2, and set nPMZR_EL0 with the other FEAT_PMUv3p9 bits. Fixes: 858c7bfcb35e1 ("arm64/boot: Enable EL2 requirements for FEAT_PMUv3p9") Cc: stable@vger.kernel.org Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Oliver Upton <oupton@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
2026-09-18Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "In this batch we've got a couple of hibernation fixes, a couple of minor MTE fixes, some per-cpu codegen fixes (which were found as part of Mark's series adding preemptible this_cpu_*() operations) and a fix for the Arm CMN PMU driver. Summary: - Fix hypercall arguments when resetting EL2 vectors during hibernation - Fix hibernation with 52-bit capable kernels on machines without 52-bit addressing, similarly to the recent kexec fix - Fix a bunch of clumsy codegen issues with our per-cpu accessors - Fix MTE ptrace documentation to reflect the de-facto ABI behaviour - Fix pthread_join() usage in MTE selftest - Fix port selection in the Arm CMN PMU driver" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: mte: Fix PTRACE_{PEEK,POKE}MTETAGS error documentation kselftest/arm64: Fix size of thread_data values for pthread_join() arm64: percpu: Fix LSE operations on {8,16}-bit types arm64: percpu: Fix this_cpu_and() mask generation arm64: percpu: Fix this_cpu_write() casting arm64: hibernate: clone only the linear map that exists at runtime perf/arm-cmn: Fix wp_dev_sel2 setting for multi-DTM configurations arm64: hibernate: pass HVC_SET_VECTORS args to the resume hvc
2026-09-17s390/pci/docs: Fix sriov_numvfs attribute nameKarl Mehltretter
The attribute is sriov_numvfs (drivers/pci/iov.c); the document names it sriov_numvf, which does not exist. Use sriov_numvfs. Fixes: de267a7c71ba ("s390/pci: Documentation for zPCI") Assisted-by: LLM Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-09-15docs: powerpc: vas-api: Fix the structure name and the ioctl number in the ↵Karl Mehltretter
example struct vas_setup_attr does not exist; the name is struct vas_tx_win_open_attr. The example also defines VAS_TX_WIN_OPEN with the request number 1, while arch/powerpc/include/uapi/asm/vas-api.h has used 0x20 since the ioctl was added. Use struct vas_tx_win_open_attr and 0x20. Fixes: c12e38b1d52e ("Documentation/powerpc: VAS API") Suggested-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com> Assisted-by: LLM Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com> Reviewed-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260907004925.10948-1-kmehltretter@gmail.com>
2026-09-11arm64: mte: Fix PTRACE_{PEEK,POKE}MTETAGS error documentationCatalin Marinas
PTRACE_{PEEK,POKE}MTETAGS return -EIO rather than -EOPNOTSUPP (as documented) when no tags are copied from/to a mapping without PROT_MTE. This has been the behaviour since the interface was introduced, though the original intent was to distinguish between address not being accessible and mapped as untagged. Update the documentation to match the implementation (de-facto ABI). Since -EOPNOTSUPP was never returned, change the error assignment to -EIO as well to avoid confusion. Fixes: df9d7a22dd21 ("arm64: mte: Add Memory Tagging Extension documentation") Fixes: 18ddbaa02b7a ("arm64: mte: ptrace: Add PTRACE_{PEEK,POKE}MTETAGS support") Reported-by: Yury Khrustalev <yury.khrustalev@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-09-07irqchip/gic-v3: Add Altera SoCFPGA Agilex5 GIC600 DMA32 erratum workaroundAdrian Ng Ho Yin
Agilex5 integrates GIC600 with an ACE-lite interface limited to a 32-bit address bus, so the ITS can only access the first 4 GB of physical address space. Register intel,socfpga-agilex5 on the existing dma_32bit_impaired_platforms list so ITS allocations use GFP_DMA32. The workaround is guarded by ALTERA_ERRATUM_AGILEX5_2_1_23, which is selected by ARCH_INTEL_SOCFPGA as all Agilex5 devices are affected. This limitation is documented as Agilex 5 ES Device Errata 2.1.23 (825514). Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://docs.altera.com/r/docs/825514/current/agilex-5-es-device-errata-and-user-guidelines/hps-gicv3-its-and-lpi-unable-to-access-physical-memory-larger-than-32-bits-causing-msi-x-interrupt-failure Link: https://lore.kernel.org/linux-arm-kernel/372f059069a5551ea1096015f855cc306dbd7cd4.1747368554.git.adrianhoyin.ng@altera.com/ # v1 Link: https://lore.kernel.org/linux-arm-kernel/6a44509ca0edaabc17e59d2e27fef1c782183456.1751618484.git.adrianhoyin.ng@altera.com/ # v2 Link: https://lore.kernel.org/linux-arm-kernel/20260622024945.21354-1-muhammad.nazim.amirul.nazle.asmade@altera.com/ # v3 (untagged) Link: https://lore.kernel.org/all/20260904091114.2259616-1-adrian.ho.yin.ng@altera.com/ #v4 Link: https://patch.msgid.link/fc927e43892b86200e157fa303b0d1dd344caffd.1788751033.git.adrian.ho.yin.ng@altera.com
2026-09-04Documentation/x86: Add documentation for TDX's Dynamic PAMTRick Edgecombe
Expand TDX documentation to include information on the Dynamic PAMT feature. The new section explains PAMT support in the TDX module and how Dynamic PAMT affects the kernel memory use. Some of the docs verbiage was provided by Dave Hansen (see link). AI was used under supervision to review the docs. Based on a patch originally by Kiryl Shutsemau. Signed-off-by: Rick Edgecombe <rick.p.edgecombe@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com> Reviewed-by: Tony Lindgren <tony.lindgren@linux.intel.com> Acked-by: Sohil Mehta <sohil.mehta@intel.com> Tested-by: Hongyu Ning <hongyu.ning@linux.intel.com> Link: https://lore.kernel.org/all/8e40862e-891a-4cad-8bb8-06ad25ad6061@intel.com/ Link: https://patch.msgid.link/20260904215841.303070-11-rick.p.edgecombe@intel.com
2026-09-01riscv: report Zfhmin/Zvfhmin when Zfh/Zvfh are presentJinRui
The RISC-V ISA manual specifies that Zfh implies Zfhmin, a normative rule clarified in https://github.com/riscv/riscv-isa-manual/pull/3070. Zvfh likewise implies Zvfhmin, as stated by the vector extension specification. The kernel currently reports ZFH and ZFHMIN (and ZVFH and ZVFHMIN) as independent hwprobe bits derived only from what the device tree declares. Platforms that declare just "zfh" (Zfh being a superset that already contains all Zfhmin instructions) therefore report RISCV_HWPROBE_EXT_ZFHMIN=0, which breaks userspace RVA23 conformance checks (e.g. snapd installing core26 on riscv64). Use the existing superset mechanism to set the implied subset bits: - zfh implies zfhmin - zvfh implies zvfhmin Add a hwprobe selftest asserting the implication holds and update the hwprobe documentation accordingly. This is complementary to the rva23u64 base behavior discussion: the RVA23 conformance query proposed there is derived from the per-extension bits fixed here, so correct EXT_0 reporting is a prerequisite for it to work on harts whose device tree declares only "zfh". Tested on a RISC-V QEMU VM whose device tree only declares "zfh" and "zvfh": with this change both /proc/cpuinfo and the hwprobe RISCV_HWPROBE_KEY_IMA_EXT_0 bitmap report ZFHMIN and ZVFHMIN, and the hwprobe selftest (including the new implication check) passes. Link: https://lore.kernel.org/kvm-riscv/20260206002349.96740-1-andrew.jones@oss.qualcomm.com/ Signed-off-by: JinRui <jinrui@haiwei.tech> Link: https://patch.msgid.link/7190E4DB338251C3+20260811081513.2849980-1-jinrui@haiwei.tech [pjw@kernel.org: trimmed superfluous blank line in tags] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-08-24Merge tag 'platform-drivers-x86-v7.3-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform driver updates from Ilpo Järvinen "Highlights: Major refactoring effort: stop setting acpi_device_name/class() and pnp.device_class to facilitate their eventual removal Many rollback/remove path fixes (presumably mostly found by AI) Miscellaneous cleanups / refactoring / improvements amd/halo: - Add Halo RGB LED driver amd/hsmp: - Properly serialize probe, remove, and data paths - Add support for protocol v7 used by Family 1AH Model 80H - Fix error checking corner cases (largely from AI review) - Reject negative power cap amd/pmc: - Improve behavior on platforms that do not support STB - Add T14 Gen2 AMD (20XL) to s2idle quirk list amd/pmf: - Add ioctl interface to retrieve device metrics - Add support for new metrics tables used by Family 1AH Model 80H qcom-hamoa-ec (arm64): - Reject short responses asus-nb-wmi: - Support ProArt key on ASUS ProArt PX13 asus-armoury: - Gate PPT writes behind active fan curve - Add power limits for more models dell-wmi-base: - Fix handling of ultra performance key dell-wmi-sysman: - Don't hex dump attribute security buffer hp-bioscfg: - Various fixes - Improve reduced ACPI packages support (necessary for HP EliteBook 840 G2) lg-laptop: - Fix LED resource handling - Add support for events used in newer models - Fix keyboard backlight support on LG Gram 16T90SP hp-wmi: - Generalize thermal params to board params - Manage CPU and GPU PWM independently - Add GPU MUX switch support - Add Victus 15-fb0xxx support - Add OMEN MAX 16-ak0xxx, OMEN 16-n0xxx, OMEN 16-wd0xxx, OMEN 16-wf0xxx, and OMEN board ID 8D88 support - Add OMEN Transcend 16-u0xxx support huawei: - Add support for Fn-lock ACPI interface found on newer Huawei laptops such as MateBook 14 2024 ISST: - Improve input validation (many fixes) - Disallow SST-CP (core-power) feature if perf profile add fails lenovo/yb9-kbdock: - Add driver for Yoga Book 9 14IAH10 lenovo/ymc: - Extend hinge switch query to support Yoga 9 2-in-1 14IPH11 - Prevent loading on Yoga Book 9 14IAH10 to avoid duplicated input nodes msi-ec: - Add MSI Raider A18 HX A9WJG and MSI Katana GF76 11UEK support msi-wmi: - Add MSI Claw M-Center keys support oxpec: - Add support for OneXPlayer X2 Mini Pro redmi-wmi: - Report kbd backlight cycle, OEM preset power mode, and FnLock toggle events to userspace samsung-galaxybook: - Add Samsung Galaxy Book6 Pro support thinkpad_acpi: - Add USB-C Security support uniwill-laptop: - Add keyboard backlight, AC auto boot, and USB powershare support - Add MACHENIKE L16 Pro, AiStone X4SP4NAL, and Avell A60 MUV support - Make lightbar max brightness configurable and add support for LAPQC71A/B" * tag 'platform-drivers-x86-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (152 commits) platform/x86: think-lmi: Fix current password length check platform/x86: redmi-wmi: report EC state change events MAINTAINERS: update Intel PMC Core maintainer contact platform/x86: oxpec: Add support for OneXPlayer X2 Mini Pro platform/x86: thinkpad_acpi: Fix fan speed reporting on Edge E330 platform/x86: msi-ec: Add MSI Katana GF76 11UEK EC firmware platform/x86: think-lmi: Fix certificate thumbprint sysfs output mlxbf-bootctl: fix the build error with FIELD_PREP() platform/x86: think-lmi: Free system certificate signatures platform/x86: ISST: Add a NULL check for sst_inst[] platform/x86: ISST: Return error during profile addition platform/x86: ISST: Just allow 2 bits for SST feature enable platform/x86: ISST: Use PP level enable mask platform/x86: ISST: Validate parameter for frequency and priority platform/x86: ISST: Validate parameter for core power state platform/x86: ISST: Validate max level for set feature platform/x86: ISST: Validate logical CPU id and clos id platform/x86: ISST: Validate level in perf mask ioctls platform/x86: ISST: Validate socket ID in clos_assoc ioctl platform/x86/amd/hsmp: Reject negative power cap writes in hwmon ...
2026-08-23Merge tag 'pci-v7.3-changes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull PCI updates from Bjorn Helgaas: "Resource management: - Add hotplug reservation only once (not at each level of the hierarchy) so bridge windows don't grow more than necessary (Ilpo Järvinen) Driver binding: - Rework device matching so device ID lifetime only needs to cover the probe path since dynamic IDs can be removed at any time (Gary Guo) Error handling: - Update mappings of AER errors to agent & layer and log them for each individual error when multiple errors detected (Lukas Wunner) - Log Error Source only once, not twice in separate messages (Lukas Wunner) - Emit TLP Log only for unmasked errors (Lukas Wunner) - Support Advisory Non-Fatal Errors (Lukas Wunner) - Allow DPC on all Downstream Ports, not just Root Ports, when OS controls AER (Darshit Shah) ASPM: - Program the same ASPM Control values for every function of multi-function devices, as recommended by the PCIe spec (Krishna Chaitanya Chundru) - Avoid L0s for Realtek RTS525A, where it causes an AER interrupt storm (Max Lee) - Avoid ASPM L0s, L1, and L1 PM Substates based on 'aspm-no-l0s', 'aspm-no-l1' [1], and 'aspm-no-l1ss' DT properties (Krishna Chaitanya Chundru) Power management: - Allow D3 for native hotplug-capable Root Ports on non-x86 platforms (we avoid D3 for these ports on x86 because some old platforms didn't validate it) (Manivannan Sadhasivam) - Allow portdrv to claim Ports even if they don't support services (AER, PME, DPC, hotplug, etc) so it can do power management (Brian Norris) Power control: - Add support for PCIe WAKE# interrupt when described via DT (Krishna Chaitanya Chundru) - For the TC9563 PCIe switch: - Take a reference on the I2C adapter to avoid uninterruptible hang when unloading an I2C module while in-use (Johan Hovold) - Update DT binding and driver to restrict Tx Amplitude, DFE and N_FTS to USP, DSP1 and DSP2 (Manivannan Sadhasivam) - Power off only external-facing ports (DSP1, DSP2), leaving USP and DSP3 (aka VDSP) powered up (Manivannan Sadhasivam) - Move integrated MAC Endpoint out of the list of internal ports and configure it separately (Manivannan Sadhasivam) Virtualization: - Add ACS quirk for Pericom PI7C9X2G608 switches (Tim Harvey) - Fix a long-standing bug in the Intel PCH Root Port MPC ACS quirk that didn't update the intended INTEL_MPC_REG_IRBNCE bit because it used a 16-bit config write when a 32-bit write was intended (Mohamad Raizudeen) Procfs: - Avoid spurious runtime PM wakeup on config space accesses that are outside config space and fail before reaching PCI (Krzysztof Wilczyński) - Warn on user-space writes to kernel-exclusive config space regions, as we already do for sysfs (Krzysztof Wilczyński) - Check credentials of opener, not reader, for config space reads, as we already do for sysfs (Krzysztof Wilczyński) Sysfs: - In pci_write_legacy_io(), avoid out-of-bounds reads from the user buffer and fix incorrect ioport write data (1-byte writes on little-endian powerpc, 2- and 4-byte writes on big-endian powerpc) (Krzysztof Wilczyński) - In pci_read_legacy_io(), fix incorrect ioport read data for 2- and 4-byte reads on big-endian powerpc (Krzysztof Wilczyński) - Fix I/O port accessor argument order in Alpha pci_legacy_write() (Krzysztof Wilczyński) - Avoid spurious runtime PM wakeup on config space accesses that are outside config space and fail before reaching PCI (Krzysztof Wilczyński) - Return -EINVAL, not -ENODEV, for mmap of I/O BAR that fails because the arch doesn't support it, as we do for procfs (Krzysztof Wilczyński) - Check for LOCKDOWN_PCI_ACCESS for legacy_io and legacy_mem, as we do for other config space accessors (Krzysztof Wilczyński) Peer-to-peer DMA: - Add Nvidia Vera Rubin to list of platforms that support P2PDMA (Leon Romanovsky) Endpoint framework: - Check doorbell SUCCESS bit in pci_endpoint_test to avoid treating some failures as successes (Niklas Cassel) - Fail doorbell test when the trigger IRQ is missed (Niklas Cassel) New native PCIe controller drivers: - Add DT binding and driver for NVIDIA Tegra264 (Thierry Reding) Native PCIe controllers: - Use common wait time definitions for PCIe link monitoring instead of defining driver-private duplicates (Thierry Reding) Generic host bridge driver: - Fix NULL pointer dereference that caused enumeration failures on 32-bit CAM systems (Steffen Persvold) Amlogic Meson PCIe controller driver: - Correct the PERST# GPIO state so it remains asserted until power and REFCLK become stable to fix enumeration failure (Ronald Claveau) ASPEED PCIe controller driver: - Switch to irq_domain_create_linear() so we can obsolete irq_domain_add_linear() (Jiri Slaby) Cadence PCIe controller driver: - Add MODULE_DEVICE_TABLE to generate module aliases for OF-based module autoloading (Pengpeng Hou) - Add debugfs 'ltssm_status' file for LGA- and HPA-based Cadence controllers (Hans Zhang) - Support up to x4 (not x2) lanes for J200 (Takuma Fujiwara) - Fix host/endpoint dependencies for cadence-plat driver to fix link error when cadence-plat is built-in but the host or endpoint driver is modular (Aksh Garg) Freescale i.MX6 PCIe controller driver: - Add imx6 intr/aer/pme interrupt lines for i.MX95 (Richard Zhu) - Remove PERST# checking from pci_host_common_parse_port() so callers can decide whether to fall back to legacy DT binding with PERST# in the host bridge (Sherry Sun) - Fix build issues when PCI_PWRCTRL_GENERIC or PCI_HOST_COMMON is a module (Arnd Bergmann) - Create pwrctrl devices only once by doing it from imx_pcie_probe() instead of imx_pcie_host_init(), which is used during both probe and resume (Sherry Sun) - Use 'dw_pcie_rp->skip_pwrctrl_off' to avoid powering off devices during suspend to preserve wakeup capability (Sherry Sun) - Add runtime PM support for i.MX95 to allow dynamic power management when the link is idle (Richard Zhu) Intel VMD host bridge driver: - Support device ID 0x28C1 and assume that BIOS has already enumerated the hierarchy below VMD and stored bus range info for OS to use (Nirmal Patel) - Add support for VMCONFIG BUS_RESTRICT_CFG=3, which makes it possible to enumerate downstream devices on Intel Arrow Lake-HX systems and probably others (Ali Alaei) - Pay attention to _OSC negotiation for VMD hierarchy only when running on bare metal, not when running in a VM (Nirmal Patel) - Add Nova Lake (NVL) and Dunlow (DNL) Device IDs (Szymon Durawa) MediaTek PCIe controller driver: - Add support for PCIe controller in EcoNet EN7528 and EN751221 SoCs (Caleb James DeLisle) MediaTek PCIe Gen3 controller driver: - Add mediatek-gen3 'memory-region' for restricted DMA buffer (Chen-Yu Tsai) NVIDIA Tegra264 PCIe controller driver: - Distinguish Tegra264 C0 PCIe controller for internal GPU from C1-C5 controllers so the unit address matches the first 'reg' entry (Thierry Reding) - Add Tegra264 Root Port stanzas to prepare for generic WAKE# handling (Thierry Reding) Qualcomm PCIe controller driver: - Add IPQ9650 compatible with global interrupt (Kathiravan Thirumoorthy) - Add IPQ5210 compatible with IPQ9574 fallback (Varadarajan Narayanan) - Add DT binding and driver support for Hawi SoC (Matthew Leung) - Skip PERST# GPIOs provided by downstream PCIe devices, which should be handled by drivers of those devices (Manivannan Sadhasivam) - Stop advertising Attention Button Present (no Qcom SoCs support Attention Buttons) so pciehp can use Presence Detect Changed events (Qiang Yu) Renesas R-Car PCIe controller driver: - Add rcar-gen4-pci-host optional 'msi-parent' for GIT ITS (Marek Vasut) - When MSI is enabled but iMSI-RX is not used, configure AXIINTC to allow GIT ITS to handle MSI (Marek Vasut) - Refactor GIC600 implementation to make it easier to add platforms that only support 32-bit addressing (Marek Vasut) - Add Renesas R-Car Gen4 S4/V4H/V4M to the list of GIC600 integrations that only support 32-bit addressing (Marek Vasut) Renesas RZ/G3S PCIe controller driver: - Add DT binding and driver support for RZ/V2H(P) SoC, which contains two PCIe controllers, configured either as a single x4 link or two independent x2 link controllers (Lad Prabhakar) SpacemiT K1 PCIe controller driver: - Add missing MODULE_DEVICE_TABLE() to generate module alias info for OF-based module autoloading (Pengpeng Hou) StarFive PCIe controller driver: - Fix resource leaks on error paths in host_init() (Ali Tariq) - Fix runtime PM handling and teardown ordering to avoid register access while power or clocks are disabled (Ali Tariq) - Check for runtime PM resume failure to avoid register access while power or clocks are disabled (Ali Tariq) Synopsys DesignWare PCIe controller driver: - Add LECARC PMU IDs to the DWC RAS/DES VSEC list so it can take advantage of the existing debugfs support for silicon debug, error injection, and event counters (Brett Zhou) - Factor pcie_valid_speed() and pci_bus_speed2lnkctl2() out of bwctrl so they can be shared by the DWC core (Hans Zhang) - Flush MSI writes from endpoint before unmapping the iATU, as we already do for MSI-X writes (Niklas Cassel) - Unmap MSI iATU window before mapping MSI-X window, to avoid a subsequent MSI write using a disabled aperture and losing the interrupt (Niklas Cassel) - Change endpoint .pre_init() and .init() callbacks to return errors and handle them (Marek Vasut) UltraRISC PCIe controller driver: - Add 'core', 'dbi', and 'aux' clocks to DT binding and manage them in the driver (Jia Wang) - Use module_platform_driver() since this may be built as a module, though not removable because IRQs can't be safely disposed (Jia Wang) MicroSemi Switchtec management driver: - Add Microchip PCI1008 device ID and include it in NTB DMA alias quirk (Logan Gunthorpe) Miscellaneous: - Document how to write PCI Host Controller drivers (Manivannan Sadhasivam) - Fix typos in documentation (D'Orus Tsitera) - Use %pe format specifier to print error pointers so we get symbolic errname when available (Krzysztof Wilczyński)" * tag 'pci-v7.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (124 commits) PCI: vmd: Add Nova Lake (NVL) and Dunlow (DNL) Device IDs PCI: tegra264: Add Tegra264 support dt-bindings: PCI: tegra264: Switch to PCIe Root Port bindings dt-bindings: PCI: tegra264: Strictly distinguish C0 from C1-C5 PCI/AER: Support Advisory Non-Fatal Errors PCI: Fix 32-bit config write in Intel PCH Root Port MPC ACS quirk PCI: dwc: Handle return value from endpoint .pre_init callback PCI: dwc: Handle return value from endpoint .init callback PCI: dwc: Add PCI ID for LECARC PCIe PMU PCI/ASPM: Mask ASPM states based on Devicetree properties PCI/ASPM: Disable/restore ASPM on every function for multi-function devices Documentation: PCI: Document how to write PCI Host Controller drivers PCI/ASPM: Use pcie_capability_clear_and_set_word() for ASPM disable/restore PCI: Add support for PCIe WAKE# interrupt PCI: Allow D3 for native hotplug-capable Root Ports on non-x86 platforms dt-bindings: PCI: Correct white-space style PCI/ASPM: Avoid L0s for Realtek RTS525A PCI: ultrarisc: Use module_platform_driver() PCI: ultrarisc: Get and enable DP1000 PCIe controller clocks dt-bindings: PCI: ultrarisc: Add required DP1000 PCIe clocks ...
2026-08-20Merge tag 'riscv-for-linus-7.3-mw1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Paul Walmsley - Add initial definitions and discovery for the Smcsrind, Sscsrind, Smcntrpmf, Ssccfg, Smcdeleg, Zicclsm, Ziccamoa, Ziccif, Ziccrse, Za64rs, and Ssqosid RISC-V ISA extensions - Improve the RISC-V update_mmu_cache_range() implementation by using flush-by-ASID, enabling performance improvements on microarchitectures that support related optimizations; and by taking advantage of the Svinval RISC-V ISA extension on microarchitectures that support it - Shrink CFI shadow stack allocation further (to 512MB) to save virtual address space (and physical memory on systems with strict overcommit policies) - Add initial CPU context switch support for QoS tagging (Ssqosid) - Change our vector misaligned access speed test code to be synchronous, avoiding a bunch of bugs related to unnecessary asynchronicity - Enable ARCH_HAS_ACPI_TABLE_UPGRADE for RISC-V to help with ACPI table debugging (similar to ARM64 and x86) - Extract vDSO section offsets at build time, rather than run time, to avoid the boot time overhead - Use assembler directives to control the use of instructions from the RISC-V ISA extensions Zacas and Zabha, rather than compiler -march flags that could affect the whole kernel (similar to ARM64) - Add a kselftest for kprobes support for the c.jal instruction on RISC-V - When UEFI runtime services are available, use them to restart and power off - Fix ARCH_HAS_ACPI_TABLE_UPGRADE for RISC-V by adding a missing include file to the ACPI code - Move contiguous DMA memory reservation later in the boot, to ensure that the correct global and per-node pools are allocated when CONFIG_CMA_SIZE_PERNUMA is enabled - Disallow probes on breakpoint handlers to avoid recursing indefinitely into do_trap_break() - Patch the compat vDSO during runtime alternatives processing, not only the standard vDSO - Remove some leftover XIP support elements missed by commit 9b3a2be84803 ("riscv: Remove support for XIP kernel") - Fix broadcast timer switching in ACPI LPI power states by implementing a RISC-V version of arch_get_idle_state_flags() - Miscellaneous fixes, including: vDSO makefile simplification; marking our default_power_off() as __noreturn; error path fixes in the PMU SBI perf driver; RISC-V extension capitalization consistency; the use of BIT() macros in one of our include files; and some documentation fixes * tag 'riscv-for-linus-7.3-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (39 commits) RISC-V: hwprobe: Use BIT macro to avoid warnings riscv: alternative: Also patch the compat vDSO riscv: alternative: Use the statically extracted vDSO section offsets riscv: vdso: Add symbols for the alternative section boundaries riscv: Add Ziccamoa, Ziccif, Ziccrse, and Za64rs to cpufeature and hwprobe riscv: Add Zicclsm to cpufeature and hwprobe riscv: cpufeature: Clarify ISA spec version for canonical order riscv: Standardize extension capitalization riscv: kprobes: Prevent probes in breakpoint handlers riscv: cmpxchg: Use .option arch for Zacas and Zabha riscv: acpi: Handle LPI architectural context loss flags riscv: further remove XIP riscv: Add support for srmcfg CSR from Ssqosid extension riscv: Detect the Ssqosid extension dt-bindings: riscv: Add Ssqosid extension description dt-bindings: riscv: add Counter delegation ISA extensions description RISC-V: Add Ssccfg/Smcdeleg ISA extension definition and parsing RISC-V: Add Ssccfg extension CSR definition dt-bindings: riscv: add Smcntrpmf ISA extension description RISC-V: Add Smcntrpmf extension parsing ...
2026-08-19Merge tag 'iommu-updates-v7.3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux Pull iommu updates from Joerg Roedel: "ARM SMMUv2: - Device-tree binding updates for Qualcomm Eliza, Maili, Shikra and IPQ9650 SoCs - Add support for Qualcomm SM8450 - Numerous fixes for lifetime and ordering issues found by Sashiko in the Qualcomm driver ARM SMMUv3: - Fix interrupt type in device-tree binding example for NVIDIA CMDQV - Numerous fixes for issues identified by Sashiko in the NVIDIA CMDQV driver - Work around TLB erratum T264-SMMU-3 on Tegra264 by repeating the invalidation sequence - Add support for HAFT (hardware access flag in table entries) when using SVA - Probe for 52-bit addressing with a page size smaller than 64k ('DS') but don't do anything with it for now - Minor driver improvements (remove sort_nonatomic(), use readl_relaxed_poll_timeout_atomic(), fix IOPF teardown ordering) Intel VT-d: - Consolidation of complex enablement logic into a clean, priority-based state machine - Support for the DMA_REMAP_OPT_OUT flag from the VT-d v5.2 specification - An update to cache_tag_flush_devtlb_psi() to use full-range constants instead of modifying shared variables for CACHE_TAG_NESTING_DEVTLB - A fix for the UCTP context-table slot when copying root entries - Fixes for several pre-existing issues reported by Sashiko - General code cleanup and refinement AMD IOMMU: - Add SNP page-mode-0 support, enabling passthrough, v2 DMA page tables and host SVA on supporting systems - Fix invalid PPR handling, COMPLETE_PPR responses and guest-mode reporting - Improve Southbridge IOAPIC validation and remove the dependency on hard-coded device IDs - Fix PCI-device lifetime, debugfs and diagnostic issues IOMMU core and IOMMUFD: - Restore serialization of the shared MSI-page list - Fix SVA-handle publication and several IOMMUFD reference and error path leaks - Return the expected zero result for invalid generic page-table translations - Allocate per-CPU IOVA magazines lazily to reduce memory use on large systems PCI ATS: - Make VF support checks account for the associated PF and validate that VF and PF Smallest Translation Unit settings agree Platform drivers: - Fix Qualcomm runtime-PM, probe unwind, fault reporting and page table initialization races - Rework Rockchip state handling and fix clock, probe and stale-fault handling - Fix smaller issues in the MSM and MediaTek drivers Device-tree bindings: - Add new Qualcomm SMMU compatibles, convert the OMAP IOMMU binding to YAML, and fix the Tegra264 CMDQV interrupt example Various smaller cleanups, documentation fixes and a Rust IOMMU safety/readability improvement" * tag 'iommu-updates-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux: (93 commits) iommu/amd: Add SNP page mode 0 support iommu/amd: Fix GN bit setting in COMPLETE_PPR_REQUEST command iommu/amd: Rate limit INVALID_PPR_REQUEST error logging iommu/amd: Fix missing CMD_COMPLETE_PPR response for invalid PPR requests iommu/amd: Introduce PPR_TAG_LAST_PAGE() macro iommu/amd: Fix incorrect device ID in invalid PASID error message iommu/vt-d: Flush context cache with correct SID when tearing down aliases iommu/vt-d: Tear down scalable-mode context on probe failure iommu/vt-d: Fix iopf_refcount leak on RID domain replacement iommu/vt-d: Clear Present bit before tearing down copied context entry iommu/vt-d: Fix copied_tables bitmap leak on error in copy_translation_tables iommu/vt-d: Cache max domain ID to avoid redundant calculation iommu/vt-d: Support the new DMA_REMAP_OPT_OUT flag bit iommu/vt-d: Remove dmar_disabled iommu/vt-d: Remove the 'force_on' variable iommu/vt-d: Call dmar_can_force_on() for tboot opt-in iommu/vt-d: Use dmar_can_force_on() for platform opt-in iommu/vt-d: Consolidate dmar policy management and force_on logic iommu/vt-d: Remove dead code when CONFIG_INTEL_IOMMU is not set iommu/vt-d: Force requesting ACS when tboot is enabled ...
2026-08-18Merge tag 'x86_cleanups_for_v7.3_rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 cleanups from Borislav Petkov: - The usual pile of smallish cleanups and fixlets all over the place * tag 'x86_cleanups_for_v7.3_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cpu: Remove unnecessary __maybe_unused annotations x86/msr: Document the I/O-like write semantics in the msr driver x86/apic: Ensure ICR register write value is handled as 32 bits x86/boot/compressed/head_64.S: Clean up SEV-related comments Documentation/arch/x86/amd-memory-encryption.rst: Fix typo x86/platform/quark: Fix kernel-doc warnings in imr.c x86/ras: Move contents from arch/x86/ras/Kconfig into drivers/ras/Kconfig x86/cpu: Move intel_get_platform_id() to cpu/intel.c x86/mm: Fix typo in comment x86/fpu: Fix kernel-doc formatting above fpu_enable_guest_xfd_features() x86/cfi: Use symmetric SYM_START and SYM_END in __CFI_TYPE() x86/cfi: Add __init_or_module annotations for fineibt
2026-08-18Merge tag 'x86_misc_for_7.3-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull misc x86 updates from Dave Hansen: "Just adding some documentation and removing a super stale comment about an LED driver that was moved long ago: - Document the intricacies of GS context switching - Remove old TODO message about Geode LED driver" * tag 'x86_misc_for_7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/platform/geode: Remove old TODO message about leds-net5501.c Documentation/x86: Document the intricacies of GS context switching
2026-08-18Merge tag 'x86-documentation-2026-08-17' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 documentation updates from Ingo Molnar: - Misc x86 documentation updates (Randy Dunlap, Daniel Gibson) * tag 'x86-documentation-2026-08-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: Documentation/arch/x86/amd-debugging: Add example for reset register x86/intel/quark: Clean up function kernel-doc x86/speculation: Drop Excess function parameter descriptions x86/lib: checksum_64.h: Eliminate all kernel-doc warnings x86/barrier: Use correct parameter names in kernel-doc
2026-08-18Merge tag 'arm64-upstream' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: "There's a reasonable amount of stuff here, including a bunch of updates to the perf PMU drivers and some MPAM updates to expose the memory bandwidth counters via resctrl. On the architecture side, some highlights include support for BBML3 and steps towards support for an architectural NMI solution, all wrapped up in a web of fixes for latent issues identified by Sashiko. ACPI: - Combine reads of AMU counters into a single FFH feedback counter op Confidential computing: - Fix smp_processor_id() in preemptible context when retrieving an attestation token inside a realm - Convert pKVM over to a "CC platform" - Clean-up our SWIOTLB configuration in preparation for reworking the handling of encrypted/decryped DMA buffers in the dma-mapping tree CPU errata handling: - Work around broken device memory ordering on NVIDIA Olympus cores - Fix broken 'nospectre_bhb' command-line option - Select the idle loop backend instruction on the command-line CPU features: - Replace our BBML2-noabort feature with the new architectural BBML3 feature - Disable in-kernel BTI for recent versions of Clang due to issues with livepatch that are still being investigated - Clean-up documentation describing which ID register fields are exposed to userspace Interrupts: - Preliminary work towards supporting FEAT_NMI, which cleans up our IRQ entry code and fixes some latent issues with pseudo-NMI - Support for an SDEI backend to trigger an NMI backtrace Memory management: - Treat all devices as coherent when CLIDR_EL1.LoC == 0 - Fix no-map handling of sub-page-sized regions - Second attempt at unmapping the linear aliases of the kernel data and bss sections - Fix EFI runtime calls when software-PAN is enabled Miscellaneous: - Add Mark Rutland as a reviewer! - Tidy-up our futex cmpxchg logic when using the new LSUI instructions - Drop the requirement on DYNAMIC_FTRACE_WITH_CALL_OPS when selecting HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS - Fix a false-positive KCSCAN splat in the delay loop - Use a portable typedef for 128-bit scalar types in our UAPI headers - Non-critical fixes for Sashiko reports all over MPAM: - Hook MPAM memory bandwidth counters into resctrl's counter assignment interface - Fix a quirk in the MPAM bandwidth counting on Nvidia T241 so that it also applies to 63 bit counters Perf: - Workarounds for hardware issues in the CMN-S3 PMU (Graviton 5) and CPU PMU (NVIDIA Olympus again!) - Add support for the DDR PMU on Marvell CN20K SoCs - Add support for Picoheart implementations of the DCW PCIe PMU - Add support for Channel/Rank/Bank filtering in the CXL PMU driver - Add support for 64-bit counters in the CSPMU device - Add support for revision 2 of the CMN S3 PMU Ptrace: - Fix a decade-old bug in our handling of seccomp and tracing on syscall entry - Fix regset handling for inactive SVE and SSVE registers Selftests - Add some tests for the decade-old bug that we just tried to fix in our syscall entry path - Fix SVE test crash on SME-only CPUs" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (95 commits) arm64/efi: Avoid voluntary preemption with efi_mm installed arm64: bti: Disable in-kernel BTI with recent versions of Clang arm64: entry: Avoid unnecessary local_irq_disable() on kernel exit irqchip/gic-v3: make the unmasking of pseudo-NMIs explicit when handling IRQs arm64: Disable KCSAN instrumentation in delay.o arm_mpam: Disable driver unbind to avoid UAF arm_mpam: Fix a NULL pointer dereference on unbinding after an error interrupt perf: arm_pmuv3: Zero initialize hw_id branch stack field arm64: mm: Unmap kernel data/bss entirely from the linear map iommu/arm-smmu-v3-sva: Use system_supports_bbml3() to detect CPU feature perf/arm-cmn: Support CMN S3 r2 perf/arm-cmn: Plumb in new filter types perf/arm-cmn: Refactor event filter data perf/arm-cmn: Refactor event filter programming perf/arm-cmn: Rename filter variables for clarity arm64: mm: fix accidental linear mapping of no-map reserved memory tools: Ensure tools copy of linux/filter.h exports the UAPI kselftest/arm64: Fix abi test compilation errors arch: arm64: add early_param idle=<wfi|yield|nop> arm64: entry: mask DAIF before returning from C EL1 handlers ...
2026-08-14Merge branch 'for-next/mpam' into for-next/coreWill Deacon
* for-next/mpam: arm_mpam: Disable driver unbind to avoid UAF arm_mpam: Fix a NULL pointer dereference on unbinding after an error interrupt arm_mpam: Apply T241-MPAM-6 to 63-bit counters arm64: mpam: Add memory bandwidth usage (MBWU) documentation arm_mpam: resctrl: Add resctrl_arch_cntr_read() & resctrl_arch_reset_cntr() arm_mpam: resctrl: Add resctrl_arch_config_cntr() for ABMC use arm_mpam: resctrl: Pre-allocate assignable monitors arm_mpam: resctrl: Pick classes for use as MBM counters
2026-08-14Merge branch 'for-next/errata' into for-next/coreWill Deacon
* for-next/errata: arch: arm64: add early_param idle=<wfi|yield|nop> arm64: proton-pack: Restore the nospectre_bhb command-line option arm64: errata: work around NVIDIA Olympus device store/load ordering arm64: Clarify ARM64_WORKAROUND_REPEAT_TLBI semantics
2026-08-11Merge branches 'arm/smmu/updates', 'arm/smmu/bindings', 'mediatek', ↵Joerg Roedel
'qualcomm/msm', 'rockchip', 'ti/omap', 'riscv', 'intel/vt-d', 'amd/amd-vi', 'core' and 'typos' into next
2026-08-07riscv: Add Ziccamoa, Ziccif, Ziccrse, and Za64rs to cpufeature and hwprobeAndrew Jones
Add Ziccamoa, Ziccif, and Za64rs to riscv_isa_ext[] so they can be parsed from devicetree/ACPI ISA strings. Ziccrse is already present in cpufeature; this patch only adds its hwprobe exposure. Expose all four extensions via hwprobe through new bits in RISCV_HWPROBE_KEY_IMA_EXT_1 (RISCV_HWPROBE_EXT_ZICCAMOA, _ZICCIF, _ZICCRSE, _ZA64RS), so userspace can probe each of these RVA23U64-mandatory extensions individually. Reviewed-by: Jesse Taube <jtaubepe@redhat.com> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com> Signed-off-by: Guodong Xu <docular.xu@gmail.com> Link: https://patch.msgid.link/20260701-rva23u64-hwprobe-v2-v5-6-2c61f94a695a@gmail.com [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-08-07riscv: Add Zicclsm to cpufeature and hwprobeJesse Taube
Zicclsm requires misaligned support for all regular load and store instructions, both scalar and vector, but not AMOs or other specialized forms of memory access, to main memory regions with both the cacheability and coherence PMAs, as defined in the profiles spec. Even though mandated, misaligned loads and stores might execute extremely slowly. Standard software distributions should assume their existence only for correctness, not for performance. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Andy Chiu <andy.chiu@sifive.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Tested-by: Charlie Jenkins <charlie@rivosinc.com> Signed-off-by: Jesse Taube <jesse@rivosinc.com> [andrew.jones: Rebased, rewrote doc text, minor commit message revisions] Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com> Signed-off-by: Guodong Xu <docular.xu@gmail.com> Link: https://patch.msgid.link/20260701-rva23u64-hwprobe-v2-v5-5-2c61f94a695a@gmail.com [pjw@kernel.org: updated to apply; added Andrew's username to his tag comments] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-08-06arm64: cpufeature: Extend bbml2_noabort support listLinu Cherian
Add below cpus to the midr list, which supports BBML2_NOABORT. Cortex A520(AE) Cortex A715 Cortex A720(AE) Cortex A725 Neoverse N3 C1-Nano C1-Pro C1-Ultra C1-Premium C1-Ultra and C1-Premium both suffer from erratum 3683289, where Break-Before-Make must be followed to avoid a livelock. For both CPUs, the erratum is fixed from r1p1. Hence we do not enable BBML2_NOABORT for CPU revisions <= r1p0. The relevant SDENs are: * C1-Ultra: https://developer.arm.com/documentation/111077/9-00/ * C1-Premium: https://developer.arm.com/documentation/111078/9-00/ Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Linu Cherian <linu.cherian@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-08-05Documentation/arch/x86/amd-debugging: Add example for reset registerDaniel Gibson
The amd debugging documentation didn't state how to identify kernel log lines with information from the reset register about the cause of a previous random reboot. Add an example. Suggested-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Daniel Gibson <daniel@gibson.sh> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Link: https://patch.msgid.link/20260624124326.746525-2-daniel@gibson.sh