Merge branch 'pci-insn-tracing'

Gerd Bayer says:

====================

While debugging some issues, I found that insn traces for RPCIT are
lacking an indication for which PCI function translation tables needed
to be synchronized with hypervisors and/or firmware and that the 64bit
address fields are traced at odd addresses. While looking into how to
address this, I found another small oddity in that the code leading to
the RPCIT instruction was expanding the 32bit function handle to a 64bit
value for the inline assembly way too high in the call-chain.

So I started this small series to address these three issues:
1/3 - Insert padding into the insn trace at natural boundaries
2/3 - Pass function handle in 32bit variables as long as possible
3/3 - Introduce a RPCIT variant of insn trace - adding function handle

With this series applied (+ a test patch to trace RPCIT even in CC0
situations) an entry in /sys/kernel/debug/s390dbf/pci_error/hex_ascii
looks like the following (removed time-stamp and ASCII transcription,
replaced instruction address with "<IA>"):

 2 - 0001 <IA>  52 00 00 00 00 00 00 00 85 00 32 2e 00 00 00 00
                ^  ^  ^                 <--------->
                |  |  Status              function handle
                |  Condition Code
                "encoded" insn

 2 - 0001 <IA>  00 00 00 01 ff 04 90 00 00 00 00 00 00 00 10 00
                                        <--------------------->
                <--------------------->       IOVA range
                      start IOVA

====================

Signed-off-by: Heiko Carstens <hca@linux.ibm.com>

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