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| author | Chenyu Chen <chen-yu.chen@amd.com> | 2026-09-07 18:43:55 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-09-17 11:38:27 -0400 |
| commit | fb8d8c5b00cf00c35944a1f046a2f1a3551546b3 (patch) | |
| tree | 509909ee5e322d216d12b922a243af66207740a4 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 30ca154558c8aef2eb9bdc8a8e8fcd3e41b6ce7e (diff) | |
| download | linux-fb8d8c5b00cf00c35944a1f046a2f1a3551546b3.tar.gz linux-fb8d8c5b00cf00c35944a1f046a2f1a3551546b3.zip | |
drm/amd/display: Use unsigned types for FRL cap check params and HPO read_state
[Why]
Commit c3fb1fb9e65f ("drm/amd/display: Fix warnings") aligned the
signedness of a large number of DC values, but two hunks of the original
change were not carried over:
- struct frl_cap_chk_params_fixed31_32 still declares audio_packet_type,
h_active and h_blank as int. All three only ever hold non-negative
values: h_active and h_blank are HDMI timing quantities counted in
pixels, and audio_packet_type is only compared against the positive
HDMI audio packet type constants 0x02, 0x07, 0x08, 0x09 and 0x0e in
frl_capacity_computations_common().
- hpo_enc3_read_state() still declares pixel_encoding, color_depth and
odm_combine as int and passes their addresses to REG_GET_2()/REG_GET(),
whose generic_reg_get*() backends take uint32_t *. The mismatch is only
hidden by the explicit (uint32_t *) cast inside the REG_GET macros. The
DCN401 equivalent, hpo_enc401_read_state(), already uses uint32_t.
[How]
Widen the three struct fields to unsigned int/uint32_t and the three
locals to uint32_t so the types match how the values are produced and
consumed. No computed value changes.
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
