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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2026-08-26 16:40:25 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2026-08-27 13:54:59 +0300 |
| commit | cd4cd3196060876640d76e85db962b6047873ee8 (patch) | |
| tree | b127b5e43a96415520e0564909c98e0f1b1c99dd /tools/perf/scripts/python/stackcollapse.py | |
| parent | 934b9973f712484af9ae8876533d9992fc59cc93 (diff) | |
| download | linux-cd4cd3196060876640d76e85db962b6047873ee8.tar.gz linux-cd4cd3196060876640d76e85db962b6047873ee8.zip | |
drm/i915/cdclk: Drop pointless platform check from bxt_set_cdclk()
Overwrite cdclk.hw.voltage_level from intel_update_cdclk() at the
end on bxt_set_cdclk() also on bxt/glk. While this isn't actually
necessary due to bxt/glk not having any extra DDI based voltage
level requirements, it does avoid one less silly 'if' in the code.
On icl+ the value derived by bxt_get_cdclk() may not be correct
if the voltage level was bumped up due to DDI requirements, thus
overwriting the assumed value is crucial there.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260826134033.13976-7-ville.syrjala@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
