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| author | Mika Kahola <mika.kahola@intel.com> | 2026-06-30 11:53:36 +0000 |
|---|---|---|
| committer | Mika Kahola <mika.kahola@intel.com> | 2026-08-03 09:45:31 +0300 |
| commit | c39a65033b398cf244546f084a505d9864d5ee19 (patch) | |
| tree | 9f0d1f5513f45e17f42d8fb9b12568d9ca188a61 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 6cff97dd5d096f0df92d7247a4fb5279252e1c63 (diff) | |
| download | linux-c39a65033b398cf244546f084a505d9864d5ee19.tar.gz linux-c39a65033b398cf244546f084a505d9864d5ee19.zip | |
drm/i915/display: Switch DG2 to use DPLL framework
Now that DG2 has a DPLL manager and its users are prepared to obtain
clock state through the framework, switch the platform over to use the
shared DPLL manager.
Remove specific MPLLB state verification and use .compare_hw function
hook to compare HW and SW PLL states.
Assisted-by: Copilot:claude-sonnet-4-6
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
Link: https://patch.msgid.link/20260630115336.1059976-5-mika.kahola@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions