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authorVarun Gupta <varun.gupta@intel.com>2026-09-18 13:43:21 +0530
committerRodrigo Vivi <rodrigo.vivi@intel.com>2026-09-18 10:31:06 -0400
commitb66b036c959f49decd2202db4026d3ae21e01388 (patch)
treeef57bf375f45809269cd1ddfdc3b33dfb9329f88 /tools/perf/scripts/python/stackcollapse.py
parent36a86c23588b8f57c9d20feb4cf5a2ab27e3baba (diff)
downloadlinux-b66b036c959f49decd2202db4026d3ae21e01388.tar.gz
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drm/pagemap: Prevent CPU stalls during unbounded pagemap teardown
drm_pagemap_dev_unhold_work() processes an unbatched llist of pagemaps on the system workqueue. This creates potential latency traps during heavy teardown cycles due to two compounding factors: 1. The loop contains a per-item drm_dbg() trace. If dynamic debug is enabled on a slow serial console, synchronous print latency scales linearly with the batch size and can block worker execution. 2. The llist can accumulate large batches during intensive unmap operations, monopolizing worker resources without yielding. This causes below log warning: "workqueue: drm_pagemap_dev_unhold_work [drm_gpusvm_helper] hogged CPU for >10000us 19 times, consider switching to WQ_UNBOUND" Fix this by implementing a latency mitigation strategy: - Move the teardown work to system_unbound_wq to avoid tying up per-CPU bound worker pools. - Add cond_resched() inside the teardown loop to yield the CPU during large batch teardowns, ensuring system responsiveness. - Convert the drm_dbg() trace to drm_dbg_ratelimited() to mitigate serial console bottlenecks while preserving debuggability. v2: - Changed workqueue from deprecated system_unbound_wq to system_dfl_wq. (Arvind Yadav) Fixes: a26084328ac4 ("drm/pagemap, drm/xe: Manage drm_pagemap provider lifetimes") Reviewed-by: Arvind Yadav <arvind.yadav@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Varun Gupta <varun.gupta@intel.com> Link: https://patch.msgid.link/20260918081320.30389-2-varun.gupta@intel.com Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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