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authorMika Kahola <mika.kahola@intel.com>2026-06-30 11:53:33 +0000
committerMika Kahola <mika.kahola@intel.com>2026-08-03 09:45:29 +0300
commit75eef2123c1d51ced45737fabec5b7e4cb65211a (patch)
treeca81083c754552c7d6e7db40d4dc28f07bb1a5da /tools/perf/scripts/python/stackcollapse.py
parent533b8c78f10e5de213b4d85bfc365292ce767fe0 (diff)
downloadlinux-75eef2123c1d51ced45737fabec5b7e4cb65211a.tar.gz
linux-75eef2123c1d51ced45737fabec5b7e4cb65211a.zip
drm/i915/display: Split out DG2 MPLLB enable helper
Refactor the DG2 MPLLB enable path by splitting out a helper that programs the PHY directly from an intel_mpllb_state. This is preparatory work for moving DG2 MPLLB handling under the DPLL framework, where callbacks operate on dpll_hw_state rather than the full crtc_state. Assisted-by: Copilot:claude-sonnet-4-6 Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> Link: https://patch.msgid.link/20260630115336.1059976-2-mika.kahola@intel.com
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