summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/stackcollapse.py
diff options
context:
space:
mode:
authorNuno Sá <nuno.sa@analog.com>2026-09-11 14:53:39 +0100
committerGuenter Roeck <linux@roeck-us.net>2026-10-18 09:35:07 -0700
commit39df36b59f01fd8f738a1c18454df54b979a7ae2 (patch)
treef53dc4ead31d8626d750341127cb97e238470d9b /tools/perf/scripts/python/stackcollapse.py
parent5e8d596d011641f6abd4377111183d62a6677f12 (diff)
downloadlinux-39df36b59f01fd8f738a1c18454df54b979a7ae2.tar.gz
linux-39df36b59f01fd8f738a1c18454df54b979a7ae2.zip
dt-bindings: hwmon/pmbus: Document MAX20826 and similar devices
The MAX20826 IC and similar provide a high-density, flexible and scalable dual-loop solution for high current cores for AI applications. These are dual loop solutions multiphase voltage regulators. Between Rails A and B, MAX20855B and MAX20908 supports up to 8 phases total configurable from 8+0 to 4+4 phases, MAX20912 supports up to 12 phases from 12+0 to 6+6, and MAX20826 and MAX20916 supports up to 16 phases from 16+0 to 8+8. The output voltage of each rail is controlled either through PMBus or through the high-speed processor voltage-control interface (Intel SVID, AMD SVI3, Nvidia PWMVID or AVSBus, depending on the device). Which one is in use is part of the configuration the device powers up with and is read back from it, hence adi,rail-a-high-speed and adi,rail-b-high-speed only tell whether the high-speed interface or PMBus controls the output voltage of the respective rail. Co-developed-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com> Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260911-hwmon-max20826-support-v2-3-5e30cbd97d84@analog.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions