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authorVille Syrjälä <ville.syrjala@linux.intel.com>2026-07-17 18:51:07 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2026-08-21 16:59:25 +0300
commit1ceb1ef81c32e83d99a52225d6437832316654a0 (patch)
treeabd6b040ee1dfab924be570f2d725bdafa64f351 /tools/perf/scripts/python/stackcollapse.py
parent1786d26887817a779641d3a093c66ac91382113b (diff)
downloadlinux-1ceb1ef81c32e83d99a52225d6437832316654a0.tar.gz
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drm/i915/cdclk: Introduce has_cd2x_pipe_select()
We have several open coded checks for the platform's cd2x pipe select capability, each written slightly differently. Move it all into a common has_cd2x_pipe_select() helper. No functional changes as the previous 'DISPLAY_VER < 30' checks were in codepaths that already exclude pre-bxt platforms, and intel_cdclk_can_cd2x_update() already rejects PTL+ via the later HAS_CDCLK_SQUASH() check. Also update the docs for the register bitfield while at it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260717155107.17801-2-ville.syrjala@linux.intel.com Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
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