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authorHonglei Huang <honghuan@amd.com>2026-09-05 21:31:42 +0800
committerMatthew Brost <matthew.brost@intel.com>2026-09-07 22:44:02 -0700
commit18299151caddd61adc977a56ef54c3043f5ed85e (patch)
treef43201fc41c24cde1f4e8438a901c06aa71ae5d5 /tools/perf/scripts/python/stackcollapse.py
parent8d242e452ed717055cae14f5d9c3cfb13b4a9c31 (diff)
downloadlinux-18299151caddd61adc977a56ef54c3043f5ed85e.tar.gz
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drm/gpusvm: keep an IOVA mapped range dma address inline
dma_iova_try_alloc() reserves one contiguous IOVA for the whole range and links each page at the next offset, so the device addresses run contiguously from entry 0 and one entry describes them all. A 2 MiB range of 4 KiB pages then drops the same 8 KiB array as a THP backed one. Fold only when state_offset covers the full range, which proves no device page was mapped in between, and only single page entries, so the order kept is 0 and stays true. Widening it instead would tell a consumer to use a huge page for npages separate CPU pages, which hangs Vega20 on amdgpu. The kept entry no longer bounds the segment, so skip the unmap walk when it has nothing to do, keyed off dpagemap rather than the flags, which are not published yet on the error unwind. Consumers need the same distinction, so drm_gpusvm_pages_first_dma() returns it alongside the array from one read of the flags; xe passes it to xe_res_first_dma(). Suggested-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Honglei Huang <honghuan@amd.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260905133142.3628027-7-honghuan@amd.com
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