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| author | Alvin Lee <Alvin.Lee2@amd.com> | 2026-08-27 15:03:33 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-09-10 12:03:39 -0400 |
| commit | 094901372adc0a2c784c052938c86571eb837630 (patch) | |
| tree | 0cd9e37bce556d3e31335b1b02124763ebfe0b00 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ab796810df23c4c0b68db0b462b6609977b024fe (diff) | |
| download | linux-094901372adc0a2c784c052938c86571eb837630.tar.gz linux-094901372adc0a2c784c052938c86571eb837630.zip | |
drm/amd/display: Dump clock registers in HW init instead of SW init
[Why & How]
- Dumping clock registers in SW init can get incorrect clock readback due
to other init code (e.g., in DMU) potentially not executed yet
- Move clk_ip register access into HW init to ensure the clock read back
gets the correct values
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions