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authorAlvin Lee <Alvin.Lee2@amd.com>2026-09-03 11:33:38 -0400
committerAlex Deucher <alexander.deucher@amd.com>2026-09-17 11:38:26 -0400
commit094108908d5072cd7b0fcf06f90530612da8748d (patch)
tree68c988e5199e3f04c738cf16271ea5ca02a430d9 /tools/perf/scripts/python/stackcollapse.py
parenta3bc27586dde44301f97de69a8f1025310083102 (diff)
downloadlinux-094108908d5072cd7b0fcf06f90530612da8748d.tar.gz
linux-094108908d5072cd7b0fcf06f90530612da8748d.zip
drm/amd/display: Program DCC as part of address update
[Description] - DCC register is latched on the surface address register being updated - In this case couple the DCC programming and the address update together to ensure the DCC programming is always taken as expected - Update address programming function to take in DCC bool, use for DCN6+ and leave older DCN unchanged. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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