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authorChristian Loehle <christian.loehle@arm.com>2026-09-16 17:27:50 +0100
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2026-09-18 17:29:08 +0200
commit76e6914a843ed2bc2bea152c30cc7dd445d02276 (patch)
tree979d8a6a23a414ee10e91398fdc04fe6debf1aa9 /scripts
parent50affbde6410825b7bd6c0f4d12dab40ec987021 (diff)
downloadlinux-76e6914a843ed2bc2bea152c30cc7dd445d02276.tar.gz
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ACPI: CPPC: Serialize PCC EPP payload updates
cppc_set_epp_perf() stages Autonomous Selection and Energy Performance Preference in the PCC shared region before taking pcc_lock. The platform may still own the subspace, or a concurrent command may consume or overwrite only part of the new payload. Take the PCC write lock and wait for OSPM ownership before staging either control. Keep the lock held until the complete payload has been submitted with CMD_WRITE, so firmware cannot observe a mixed transaction. For a mixed PCC/non-PCC description, complete every fallible non-PCC write before staging PCC data. Cross-address-space updates cannot be atomic, but a non-PCC failure can no longer leave an unsent value in shared memory for a later PCC command to consume. Reject an unsupported PCC width before any non-PCC control is changed. Classify every writable control as either PCC or non-PCC. For SystemIO, require port-I/O support and an access within the port range. Require natural alignment on non-x86 platforms, whose port-I/O accessors use MMIO; x86 port instructions support unaligned addresses. Also require a field covering the complete access unit. cpc_write() performs a raw whole-port write, so any other geometry could update the wrong bits or corrupt an adjacent field. If ownership acquisition or PCC staging fails, abort any older pending performance batch before releasing the exclusive lock so its Phase-II waiters receive the error instead of sleeping indefinitely. This follows the PCC ownership sequence in ACPI 6.5 Section 14.5. Fixes: 7bc1fcd39901 ("ACPI: CPPC: Add AMD pstate energy performance preference cppc control") Reported-by: Sashiko <sashiko-bot@kernel.org> Link: https://sashiko.dev/#/patchset/20260724134251.1632824-1-christian.loehle%40arm.com Link: https://sashiko.dev/#/patchset/20260807111303.1062391-1-christian.loehle%40arm.com Signed-off-by: Christian Loehle <christian.loehle@arm.com> Tested-by: Sumit Gupta <sumitg@nvidia.com> Link: https://patch.msgid.link/20260916162805.1039247-6-christian.loehle@arm.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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