ACPI: CPPC: Validate PCC overlaps across processors

PCC shared-memory offsets are physical within a subspace, but the
existing overlap check stops at one _CPC package. Two processors can
therefore pass probe with writable ranges which overlap in the same PCC
subspace.

This is unsafe in the performance path, where CPUs may stage requests
concurrently while holding the shared side of pcc_lock. Partially
overlapping stores can construct a payload which belongs to neither
request before a doorbell submits it.

Index retained PCC byte ranges by subspace and physical interval. The
registry checks entries within the new descriptor as well as other CPUs,
replacing the separate same-descriptor PCC overlap pass. Permit
read-only overlap and exact aliases of the same logical CPPC entry. The
per-subspace payload lock serializes each exact-alias field store,
including multi-byte fields copied with byte-oriented I/O. Reject every
other overlap involving a writable entry.

Each CPC descriptor owns its interval records. Remove them when processor
teardown unpublishes the descriptor and on probe failure.

Fixes: 80b8286aeec0 ("ACPI / CPPC: support for batching CPPC requests")
Signed-off-by: Christian Loehle <christian.loehle@arm.com>
Tested-by: Sumit Gupta <sumitg@nvidia.com>
Link: https://patch.msgid.link/20260916162805.1039247-13-christian.loehle@arm.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

0 files changed, 0 insertions, 0 deletions