ACPI: CPPC: Keep Performance Limited clearable on NVIDIA T41

NVIDIA T41 firmware describes Performance Limited as a two-bit field at
offset zero in a DWord SystemMemory access unit. Generic CPPC code must
keep such a field read-only because preserving the remainder when clearing
it requires a read-modify-write which cannot be interlocked with platform
updates.

The remaining bits of this access unit are unimplemented on T41: they read
as zero, writes have no side effects, and no other register uses them. The
Performance Limited register therefore owns the complete access unit, but
shipped firmware does not describe that property accurately.

Add a CPPC platform-quirk table keyed by the DSDT header and carry quirk
behavior through explicit flags. Cache a successful table lookup, copy each
GAS into the driver's private descriptor, and apply fixups before layout
validation, mapping and overlap registration.

Distinguish a genuine non-match from a table-header lookup failure in
acpi_match_platform_list(). Propagate lookup errors from CPPC probe without
caching them, so a transient mapping failure cannot disable the workaround
for every later processor. Existing matcher callers still treat all
negative results as no match.

For the known T41 layout only, widen a two-bit Performance Limited field at
offset zero to its 32-bit access width. Clearing both status bits can then
be issued as one DWord write of zero without a stale read. Corrected
firmware which reports the full width is unchanged. The workaround
therefore lapses automatically when corrected firmware ships.

Link: https://lore.kernel.org/lkml/d5f1ea9b-53b7-4db2-983a-b5be8e71a371@arm.com/
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
[ Rework quirk matching and fixup placement; propagate lookup failures
  without caching them. ]
Signed-off-by: Christian Loehle <christian.loehle@arm.com>
Tested-by: Sumit Gupta <sumitg@nvidia.com>
Link: https://patch.msgid.link/20260916162805.1039247-16-christian.loehle@arm.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

0 files changed, 0 insertions, 0 deletions