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| author | Ritesh Harjani (IBM) <ritesh.list@gmail.com> | 2026-10-06 15:58:41 +0530 |
|---|---|---|
| committer | Sean Christopherson <seanjc@google.com> | 2026-10-13 12:05:29 -0700 |
| commit | e5983ef19a6a4243ea9e6c7612dd7b59620c8745 (patch) | |
| tree | 299db7eba76b9f03707753a19dd9cd63f2961d4e /scripts/basic | |
| parent | 1b53b581d4e8de0e48e33f19f131ab88987c4eac (diff) | |
| download | linux-e5983ef19a6a4243ea9e6c7612dd7b59620c8745.tar.gz linux-e5983ef19a6a4243ea9e6c7612dd7b59620c8745.zip | |
KVM: selftests: Enable access tracking perf test for PPC (with LPAR clause)
Enable the access tracking perf test for PPC, but skip the idle page count
sanity check when running as a pSeries LPAR, which has the same nested
TLB/access bit issue as x86. PowerPC nested KVM (pSeries LPAR) can hide
accessed/idle, since KVM (L1) doesn't explicitly flush the TLB for access
bit update, so L0 keeps translations cached. That also means that the L2
accesses do not refault and L1 thinks that the pages for L2 memory are
still idle.
Use kvm_is_ppc_pseries_lpar() check to detect when running nested on
powerpc pseries LPAR and only warn on the idle-page count.
Reported-by: Anushree Mathur <anushree.mathur@linux.ibm.com>
Tested-by: Anushree Mathur <anushree.mathur@linux.ibm.com>
Signed-off-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com>
Reviewed-by: Gautam Menghani <gautam@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Acked-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/0227000da4e6fe69b278dc971b74b3f65b73ead9.1791280439.git.ritesh.list@gmail.com
[sean: massage changelog]
Signed-off-by: Sean Christopherson <seanjc@google.com>
Diffstat (limited to 'scripts/basic')
0 files changed, 0 insertions, 0 deletions