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| author | Mark Brown <broonie@kernel.org> | 2026-10-21 16:25:53 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-10-21 16:25:53 +0100 |
| commit | d153f261a56dc08bbda19a356e9d8f8fa2f2969e (patch) | |
| tree | 98f8fe7e3e7a34a885e65cfe15287b512b5e1e86 /scripts/basic | |
| parent | bef34efba74d87d5c20e3bb93539fa45b3cb8a83 (diff) | |
| parent | d9c23ac1217ab094e6bd9ab95e159ec72c8baca5 (diff) | |
| download | linux-d153f261a56dc08bbda19a356e9d8f8fa2f2969e.tar.gz linux-d153f261a56dc08bbda19a356e9d8f8fa2f2969e.zip | |
ASoC: wm8994/midas_wm1811: fix codec clocking issues
Marek Szyprowski <m.szyprowski@samsung.com> says:
This patchset fixes a few issues in the WM8994/WM1811 codec clocking
code, which show up on the Exynos4412 Trats2 board. On that board the
codec AIF1 and SYSCLK run from MCLK2 (the 32768Hz clock provided by the
PMIC) when idle, and from FLL1 (fed by MCLK1, a fixed 24MHz clock) when
a stream is active.
The symptoms are the codec flooding the kernel log with FIFO error
interrupts every 10ms once any digital path is powered up, for example
by the mixer state restored by alsactl, and FLL1 failing to lock:
wm8994-codec wm8994-codec: Timed out waiting for FLL lock
wm8994-codec wm8994-codec: FIFO error
wm8994-codec wm8994-codec: FIFO error
...
Both issues disappear when booting with clk_ignore_unused, or after the
WLAN/Bluetooth drivers enable the shared 32kHz clock. This went
unnoticed during the initial Midas audio contribution probably because
the WLAN/Bluetooth drivers kept their clocks enabled that time. Several
bugs contribute to this:
1. aif_mclk_set() never enables MCLK2 for an AIF clocked from it, due
to a missing shift of the AIFnCLK_SRC field value, so the codec runs
from a stopped clock until another user enables it.
2. The AIFnCLK rate ratio saved when SYSCLK drops to 32kHz gets
overwritten on each subsequent clock reconfiguration done in the low
SYSCLK mode, so AIF1 ends up at 128fs instead of 256fs.
3. wm8994_set_dai_sysclk() passes the AIF index instead of the MCLK
index to wm8994_set_mclk_rate(), so the rate of MCLK1 is reported for
MCLK2 and the low SYSCLK handling is skipped.
4. The midas_wm1811 machine driver starts FLL1 at 11.2896MHz when no
stream is active, while AIF1 keeps the configuration of the last
stream (or the 48kHz reset default), which needs 12.288MHz.
Patches have been developed with LLM assistance and have been tested on
the real Trats2 board. The built-in speaker as well as headphones jack
provide proper audio now.
Link: https://patch.msgid.link/20261021101750.3297770-1-m.szyprowski@samsung.com
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