ASoC: fsl_utils: Tolerate fractional PLL rate residue

fsl_asoc_constrain_rates() admits a sample rate only when an audio PLL
divides it exactly. On i.MX8M Plus, fractional audio PLLs may read a few
hertz off their nominal rate after clk_set_rate(). For example,
audio_pll1 can read 393215997 Hz after restoring 393216000 Hz.

This residue can make the helper exclude a valid sample-rate family,
causing a 48 kHz stream to fail or be resampled after PLL trimming.
Accept remainders within 100 Hz of either end of the divisor range.
The other rate family differs by tens of kilohertz, so the tolerance
does not make the families overlap.

Observed on a custom i.MX8MP-based board: after 44.1 kHz playback and
PLL trimming, subsequent 48 kHz playback was silently resampled.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://patch.msgid.link/20261019224724.236388-1-festevam@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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