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authorXincheng Zhang <zhangxincheng@ultrarisc.com>2026-09-05 10:56:35 +0800
committerManivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>2026-10-14 11:38:00 +0530
commit8da2b970ed4c8188ef464cee060707f2370e015c (patch)
tree2886e192028535d4c8954d5be1e5a3732f41b722 /scripts/basic
parent17b478b29cf15f3a96d441d5de773bfd9859b4c2 (diff)
downloadlinux-8da2b970ed4c8188ef464cee060707f2370e015c.tar.gz
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PCI: ultrarisc: Skip MEM outbound iATU setup on DP1000
DP1000 has 16 outbound iATU windows and each window can map up to 4GB. One window is used for CFG accesses, one for I/O space and one for the 32-bit MEM aperture, leaving only 13 windows for the 64-bit MEM aperture. This limits the 64-bit MEM aperture that can be described with outbound iATU windows. DP1000 routes MEM transactions without using outbound iATU windows, so skip generic DWC MEM outbound iATU setup to allow a larger 64-bit MEM aperture. DP1000 does not use ECAM for this controller. Config space accesses keep using the normal DWC config access path and CFG outbound iATU programming. I/O space is also unchanged and still uses an outbound iATU window. The new flag only skips generic MEM-window programming. The DP1000 integration has SoC wrapper address decode for the PCIe MEM apertures described by the "ranges" property. CPU physical accesses to those MEM apertures are routed directly as PCIe MEM transactions with the corresponding PCIe bus address, without consuming outbound iATU windows. Set 'dw_pcie_rp->bypass_ob_mem_iatu' for this controller. Signed-off-by: Xincheng Zhang <zhangxincheng@ultrarisc.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Link: https://patch.msgid.link/20260905025635.211390-3-zhangxincheng@ultrarisc.com
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