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authorMohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>2026-10-09 18:42:48 +0530
committerMark Brown <broonie@kernel.org>2026-10-16 22:16:24 +0100
commit8987e9a24f453e5080327ee5c71b4d40858c24eb (patch)
treec414b8f8e49b6c3c384a5578e8ae5f638b71ef1c /scripts/basic/split-include.c
parent8855a9319c18d46db02ddbd11960a30436e642f5 (diff)
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ASoC: codec: pcm1681: Add optional SCK clock and runtime PM support
The PCM1681 requires its SCK system clock to be running before register access. On platforms where SCK is provided by a gateable clock, register access may fail when the clock is disabled.   Add support for an optional "sck" clock and enable it before accessing the device. After enabling SCK, wait for the required 65536 system clock cycles to allow the device to complete its internal reset sequence.   Use runtime PM to manage SCK instead of keeping it enabled for the lifetime of the device. Disable the clock during runtime suspend and restore it on runtime resume. Use autosuspend to avoid unnecessary clock toggling between closely spaced accesses.   Since the device register state may be lost when SCK is disabled, enable the regmap cache. Switch regmap to cache-only mode and mark the cache dirty on runtime suspend, then synchronize the cached register state after SCK is restored on runtime resume. Mark the zero-detect status register volatile since it is updated by hardware.   Drop idle_bias_on so that the component can reach SND_SOC_BIAS_OFF and runtime suspend can gate SCK. Assisted-by: LLM Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Link: https://patch.msgid.link/20261009-nord-asoc-driver-support-v3-v3-2-0c1897f21ccf@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
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