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authorJason Gunthorpe <jgg@nvidia.com>2026-10-02 22:23:20 -0300
committerWill Deacon <will@kernel.org>2026-10-04 15:57:40 +0000
commit84c6089a365ff5547f9ea30cb407dc5fe3124fd3 (patch)
tree338d875fbdca593aa6950594fd143749b9c37fb7 /scripts/basic/split-include.c
parentb370a5e979f8bb8f34e30ad126ade734d8f128c0 (diff)
downloadlinux-84c6089a365ff5547f9ea30cb407dc5fe3124fd3.tar.gz
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iommu/arm-smmu-v3: Handle ARM erratum for CONT under invalidation with SVA
The erratum (MMU-700: #3777127, S3: #3673557) deals with under invalidation of a CONT PTE grouping in the SMMU. The recommended work around is to use a range invalidation that spans the entire CONT. The only user of CONT in the kernel right now is through SVA sharing a CPU page table that contains a CONT created by the mm. Previously it was thought that this errata was dealt with because the driver always uses range invalidation. However, there is a subtle detail in the errata that the invalidation range must fully enclose the entire CONT for it to work. It seems that two sequential range invalidations, with a split point falling inside a CONT grouping, will not prevent the errata. The SMMU's range invalidation generation algorithm does not produce a single invalidation for a single SVA invalidation request, nor does the mm carefully align the SVA invalidation ranges to accommodate the splitting of the invalidation into several ranges. Thus, when processing a SVA invalidation, the range invalidation splitting routine can generate a range invalidation that is split in the middle of the CONT and risk under invalidation from this errata. This condition could be triggered by a malicious userspace manipulating the TLB gathers via mmap/mprotect/munmap. Update the errata list to the include the S3 variation, detect the IOMMUs that have it, and then have SVA invalidations use a simplified version of the over invalidation algorithm from the tlbi rework series. This ensures that a single range invalidation is issued for a single MMU notifier callback and now the range invalidation is guarenteed to cover any posible CONT. Future work to add CONT to iommu_domain page tables should either use this one-invalidate/one-range invalidation algorithm or disable CONT support in the iommu_domain. Cc: stable@vger.kernel.org Cc: Vijayanand Jitta <vijayanand.jitta@oss.qualcomm.com> Fixes: 3f1ce8e85ee0 ("iommu/arm-smmu-v3: Share process page tables") Reviewed-by: Mostafa Saleh <smostafa@google.com> Reviewed-by: Pranjal Shrivastava <peaan@google.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Tested-by: Pranjal Shrivastava <praan@google.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Will Deacon <will@kernel.org>
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