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| author | Guodong Xu <guodong.xu@oss.qualcomm.com> | 2026-09-20 03:18:22 -0400 |
|---|---|---|
| committer | Paul Walmsley <pjw@kernel.org> | 2026-10-08 15:24:48 -0600 |
| commit | 40623184c6f041c6f8901f5e822ef5deb01556cc (patch) | |
| tree | 7128219cdff41bb1e7cd91f3b36f968601d6e002 /scripts/basic/split-include.c | |
| parent | fbab8abaac8f4d84aece087e19b4f2cd11175477 (diff) | |
| download | linux-40623184c6f041c6f8901f5e822ef5deb01556cc.tar.gz linux-40623184c6f041c6f8901f5e822ef5deb01556cc.zip | |
dt-bindings: riscv: Require block-size for Zicbom, Zicbop, and Zicboz
Zicbom, Zicbop, and Zicboz have no default cache block size, so a
devicetree that declares one must also provide the matching
riscv,cbom/cbop/cboz-block-size property. Make it required so a
missing block-size property can be caught by dtbs_check.
Match only nodes that use riscv,isa-extensions, so nodes carrying just
the deprecated riscv,isa string are not affected.
Suggested-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Guodong Xu <guodong.xu@oss.qualcomm.com>
Link: https://patch.msgid.link/20260920-rva23u64-hwprobe-v2-v8-2-5f14bc5c23d3@oss.qualcomm.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
Diffstat (limited to 'scripts/basic/split-include.c')
0 files changed, 0 insertions, 0 deletions