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authorMichał Kopeć <michal@nozomi.space>2026-10-03 21:45:00 +0200
committerMark Brown <broonie@kernel.org>2026-10-08 10:15:42 +0200
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ASoC: mediatek: mt8188: Constrain UL8 FE to its back end's capabilities
UL8 advertises up to 24 channels, but its only back end, ETDM1_IN, supports at most 16, and its bit clock is limited to 24.576 MHz. Without merged constraints, userspace can open UL8 with 48 kHz, 24 channels and 32-bit slots, which then fails in hw_params: mtk_dai_etdm_configure bck rate 36864000 not support ASoC error (-22): at snd_soc_dai_hw_params() on ETDM1_IN Set dpcm_merged_chan/rate/format, as the DL front ends already do, so the FE only offers configurations the back end can accept. Fixes: 96035d46d4b4 ("ASoC: mediatek: mt8188: add machine driver with mt6359") Signed-off-by: Michał Kopeć <michal@nozomi.space> Link: https://patch.msgid.link/20261003194501.832558-4-michal@nozomi.space Signed-off-by: Mark Brown <broonie@kernel.org>
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