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| author | Jakub Kicinski <kuba@kernel.org> | 2026-10-21 16:41:39 -0700 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2026-10-21 16:41:39 -0700 |
| commit | 68bc53d9bdd201f762a22f67e61449f2bf63f35a (patch) | |
| tree | e9120dd25982518990761fffd5c6917b0cd83b5e /scripts/Makefile.thinlto | |
| parent | de4aa72d6bb84d1ddb50669ffb7f62164fe49887 (diff) | |
| parent | 5e91edfb0e4512e9b84ffa0264d5872fa600e050 (diff) | |
| download | linux-68bc53d9bdd201f762a22f67e61449f2bf63f35a.tar.gz linux-68bc53d9bdd201f762a22f67e61449f2bf63f35a.zip | |
Merge branch 'net-pcs-add-basic-support-for-rk3568-xpcs'
Coia Prant says:
====================
net: pcs: add basic support for RK3568 XPCS
This series adds proper SGMII support for the Rockchip RK3568 SoC
using the integrated Synopsys DesignWare XPCS, along with necessary
fixes and refactoring in the stmmac core and XPCS driver.
Motivation
==========
The RK3568 integrates a DW XPCS accessed via APB3 and connected to
a Naneng Combo SerDes PHY. Several boards (e.g., Ariaboard
Photonicat) use this interface for Gigabit Ethernet. However, the
current upstream stmmac driver does not support this configuration,
and the XPCS driver has issues in SGMII poll mode that cause the
link to be reported incorrectly.
This series addresses these issues by:
- Adding ANRESTART support for SGMII link recovery
- Adding a Rockchip XPCS platform glue driver and wiring it up in
dwmac-rk
Series overview
===============
RK3568 XPCS/SGMII:
Patch 1: add ANRESTART support for SGMII link recovery
Patch 2: DT binding for Rockchip RK3568 XPCS
Patch 3: implement the Rockchip XPCS platform glue driver
Patch 4: DT binding for Rockchip DWMAC PCS
Patch 5: wire up SGMII support in dwmac-rk
Patch 6: update MAINTAINERS
Dependencies
============
- Generic PM domain (genpd) changes:
https://lore.kernel.org/all/20260925041751.495818-1-coiaprant@gmail.com/
- PHY binding+driver (Naneng Combo PHY SGMII MAC selection):
https://lore.kernel.org/all/20261006162807.2843858-1-coiaprant@gmail.com/
The DTS changes using the PHY property are sent separately to
Heiko/linux-rockchip. There is no hard build dependency; the pieces
can converge during the merge window.
Notes
=====
- When testing out-band mode with set_clk_tx_rate, only 1000Mbps
works on both TX/RX; 10/100Mbps only works on TX side.
Acknowledgments
===============
This work was inspired by and builds upon the excellent work of others:
- Serge Semin's Synopsys DesignWare XPCS platform driver (pcs-xpcs-plat.c)
- Clément Léger's Renesas MIIC driver (pcs-rzn1-miic.c)
- The Rockchip TRM and downstream OEM drivers
====================
Link: https://patch.msgid.link/20261017054406.1828061-1-coiaprant@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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