irqchip/gic-v3: Ensure change to DS is visible

Sashiko reported missing GIC synchronization when the
FLAGS_WORKAROUND_INSECURE path modifies DS. Specifically, an immediate
read of the DS state after the write might not observe the effect of
that write, which can lead to misreporting the DS state.

Updates to the DS bit are tracked by RWP, so poll it after the write
before proceeding to read back the DS state.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://patch.msgid.link/20260930161123.46368-1-vladimir.murzin@arm.com

0 files changed, 0 insertions, 0 deletions