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| author | Zhu Ling <zhuling2709@phytium.com.cn> | 2026-09-29 11:10:50 +0800 |
|---|---|---|
| committer | Thomas Gleixner <tglx@kernel.org> | 2026-10-15 11:55:41 +0200 |
| commit | 13ce14ca41a35f5ee90b77ffa57da91ce6048a2d (patch) | |
| tree | c442a8ceac4351977e46500874ffcfb9502b23bc /scripts/Makefile.thinlto | |
| parent | 6a21693b97ee5cb0a21d04bfd051a05dde5aa783 (diff) | |
| download | linux-13ce14ca41a35f5ee90b77ffa57da91ce6048a2d.tar.gz linux-13ce14ca41a35f5ee90b77ffa57da91ce6048a2d.zip | |
irqchip/gic: Fix UBSAN shift-out-of-bounds in GIC helpers
When running with UBSAN enabled, enabling a GPIO controller that uses a
GIC interrupt as its parent triggers several shift-out-of-bounds warnings:
shift-out-of-bounds in drivers/irqchip/irq-gic-common.c:50:21
left shift of 2 by 30 places cannot be represented in type 'int'
Similar reports are emitted from gic_poke_irq() and gic_peek_irq() in
drivers/irqchip/irq-gic-v3.c. The corresponding GICv2 helpers use the
same signed-shift pattern. These masks are generated by shifting signed
integer constants, which invokes undefined behavior when bit 31 is
selected.
Use BIT() to generate the masks with an unsigned type and make their
intent explicit.
Fixes: f27ecacc54cc ("[ARM] Add support for ARM GIC")
Fixes: 5c0c1f08abf0 ("ARM: 6150/1: gic: implement set_type")
Fixes: 021f653791ad ("irqchip: gic-v3: Initial support for GICv3")
Signed-off-by: Zhu Ling <zhuling2709@phytium.com.cn>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Zenghui Yu (Huawei) <zenghui.yu@linux.dev>
Reviewed-by: Radu Rendec <radu@rendec.net>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/2fJDwUUYdEf2_eaRa041L9xkT8RkSWFeo7euOnqMbbPhUatLlEaAvGfB6sOspDmXaxO87Eh7bQLV9UolyjbMtZBT1wB2UGypjPOo0Z-RC0Q=@proton.me
Link: https://patch.msgid.link/20260929031050.16988-1-zhuling2709@phytium.com.cn
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions
