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authorPengpeng Hou <hppiscas@163.com>2026-09-20 21:06:53 +0800
committerThomas Gleixner <tglx@kernel.org>2026-10-15 11:50:47 +0200
commit0f214e5bbee59d5952d3c061fd65ed9a1e175981 (patch)
treef2de1e1b86cf5177f8647e1c5fa42dddddbe6025 /scripts/Makefile.thinlto
parent16f25d326e5d3b9fd51bc5e3916ecbffbca63e7b (diff)
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irqchip/sifive-plic: Avoid signed shift in interrupt enable mask
__plic_toggle() builds a 32-bit interrupt enable mask using a signed integer literal. A valid interrupt selecting bit 31 evaluates 1 << 31, which shifts a signed int into its sign bit. Use BIT(), matching the equivalent mask construction in plic_irq_eoi(). The resulting mask remains representable in u32 on both RV32 and RV64. The issue was found by our static-analysis tool. Fixes: 8237f8bc4f6e ("irqchip: add a SiFive PLIC driver") Signed-off-by: Pengpeng Hou <hppiscas@163.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Assisted-by: gpt 5 Link: https://patch.msgid.link/caplitmus-rv.v2.plic.87a8fc444de44e109889ba28703c76f3@163.com
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