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authorFangzhi Zuo <jerry.zuo@amd.com>2026-10-10 11:01:35 -0400
committerAlex Deucher <alexander.deucher@amd.com>2026-10-27 17:05:56 -0400
commit0d7ee3341609151ceb6071e85e102e9b1806b6dc (patch)
tree01da16182fbf3a72dab41376d18b97b622781cb4 /rust/kernel
parente9ddfb93fafa50f92165d2b48c7728720999b117 (diff)
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drm/amd/display: Cap DSC bpp for USB4 DP tunnels
On pre-DCN4.2 platforms, USB4 DP bandwidth allocation is unavailable. SST and MST streams are sized against their native DP link bandwidth even when multiple DP tunnels share the host router. A high-bandwidth DSC stream can consume too much shared tunnel capacity and cause intermittent display corruption when another tunnel is active. Cap the DSC target at 8 bpp for USB4 DPIA SST and MST streams when bandwidth allocation is unavailable. For MST, cap the DSC fairness range while preserving its per-link allocation. When bandwidth allocation is enabled on DCN4.2, retain forced DSC and the existing minimum-bpp behavior required to fit the tunnel grant. This is a follow-up to commit c30b9813bce1 ("drm/amd/display: Force DSC to 8bpp for SST DP tunneling over USB4") and commit cd53dcd2a7d7 ("drm/amd/display: Force DSC to 8bpp for MST DP tunneling over USB4"). Reviewed-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit e2bd5d908a89252ad4ee11a3dbc9fd57c257accd)
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