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authorTaniya Das <taniya.das@oss.qualcomm.com>2026-08-01 19:43:52 +0530
committerBjorn Andersson <andersson@kernel.org>2026-08-31 15:10:11 -0500
commit348a2ae162e5ec2dbab12c226b8240b8271ca444 (patch)
tree876450cc10a65566fd6df6a79de508bd82f109e5 /include
parentcee9395acd8043be0644b25c34bfa86623f2b935 (diff)
downloadlinux-348a2ae162e5ec2dbab12c226b8240b8271ca444.tar.gz
linux-348a2ae162e5ec2dbab12c226b8240b8271ca444.zip
dt-bindings: clock: qcom: Add GCC video axi reset clocks for Nord
The NW_GCC video axi reset clocks are required by the video SW driver to assert and deassert the clock resets during their power down sequence. Hence add these clock resets. Fixes: 06498d59bb4e ("dt-bindings: clock: qcom: Add Nord Global Clock Controller") Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260801-nord_videocc_camcc-v2-1-674d7718e41f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/clock/qcom,nord-nwgcc.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,nord-nwgcc.h b/include/dt-bindings/clock/qcom,nord-nwgcc.h
index b6253dd2aa85..8beaa129aa81 100644
--- a/include/dt-bindings/clock/qcom,nord-nwgcc.h
+++ b/include/dt-bindings/clock/qcom,nord-nwgcc.h
@@ -65,5 +65,8 @@
#define NW_GCC_GPU_2_BCR 6
#define NW_GCC_GPU_BCR 7
#define NW_GCC_VIDEO_BCR 8
+#define NW_GCC_VIDEO_AXI0_CLK_ARES 9
+#define NW_GCC_VIDEO_AXI0C_CLK_ARES 10
+#define NW_GCC_VIDEO_AXI1_CLK_ARES 11
#endif