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authorLinus Torvalds <torvalds@linux-foundation.org>2026-10-28 07:21:13 -1000
committerLinus Torvalds <torvalds@linux-foundation.org>2026-10-28 07:21:13 -1000
commite191b05f321b064a973399b7cdc003c0de89e5b9 (patch)
tree3d39ae34f3c0662113ee33edb6f4f539499ddb78 /include/linux
parent1cb6cfab0916d18f88d44e4a23806b6c4cb355f8 (diff)
parent8f56fdf3d8cb9f1dbdc93bf9ac816698aa6f70b7 (diff)
downloadlinux-e191b05f321b064a973399b7cdc003c0de89e5b9.tar.gz
linux-e191b05f321b064a973399b7cdc003c0de89e5b9.zip
Merge tag 'phy-for-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy updates from Vinod Koul: "As usual bunch of new device and driver support and updates to existing drivers: New Support: - Rockchip rk3576 csi dphy support - Mediatek MT8195, MT8196 DisplayPort PHYs. MT8196 PCI-Express Gen4 S-PHY, MT8189 tphy support - Qualcomm Nord eUSB2, QMP USB PHY, QMP PCIe and Gen5x16 PHY support, M31 eUSB2 PHY, Maili QMP UFS & PCIe PHY, Shikra PCIe phy - New driver for Qualcomm CSI2 C-PHY/DPHY support and new APIs in core to parse phy nodes - Nvidia Tegra238 XUSB pad controller support, Tegra264 MPHY driver, Tegra264 xusb support - Thunderbolt phy support in core and Qualcomm driver support for USB4 for X1E platforms - Google Tensor SoC USB PHY driver - ASPEED AST2700 USB3 PHY driver - Microchip MCP2542 can phy support Updates: - FRL TxFFE config support and Samsumg driver support and runtime PM for dcphy driver - Mediatek optional repeater support for USB2 ports - Refactoring and improvements on rockchip usbdp driver - Apple USB4 pipehandler state support - Rockchip single-lane DP support" * tag 'phy-for-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (114 commits) phy: tegra: Add support for Tegra238 XUSB pad controller phy: tegra: xusb: Use dev_err_probe() dt-bindings: phy: tegra194: Add compatible for Tegra238 MAINTAINERS: Add ASPEED USB3 PHY driver phy: aspeed: Add AST2700 USB3.2 PHY driver dt-bindings: phy: aspeed: Document AST2700 USB3.2 PHY phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3576 variant dt-bindings: phy: rockchip-inno-csi-dphy: add rk3576 variant phy: mediatek: Add support for PCI-Express Gen4 S-PHY dt-bindings: phy: Document MT8196 MediaTek PCI-Express Gen4 S-PHY phy: tegra: Add Tegra264 MPHY driver dt-bindings: phy: Add nvidia,tegra264-mphy phy: rockchip: samsung-hdptx: Add support for FRL TxFFE level control phy: rockchip: samsung-hdptx: Handle PHY config after module reload phy: hdmi: Add optional FRL TxFFE config options phy: tegra: xusb: Add Tegra264 support phy: tegra: xusb: Increase timeout for USB2_TRK_COMPLETED polling phy: tegra: xusb: Use devm_clk_get_optional to fetch USB2 tracking clock dt-bindings: phy: tegra-xusb: Add support for Tegra264 phy: freescale: fsl-samsung-hdmi: initialize default rate ...
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/phy/omap_control_phy.h2
-rw-r--r--include/linux/phy/phy-hdmi.h6
-rw-r--r--include/linux/phy/phy-thunderbolt.h14
-rw-r--r--include/linux/phy/phy.h2
4 files changed, 23 insertions, 1 deletions
diff --git a/include/linux/phy/omap_control_phy.h b/include/linux/phy/omap_control_phy.h
index aec57dd784f7..5652aa2f4915 100644
--- a/include/linux/phy/omap_control_phy.h
+++ b/include/linux/phy/omap_control_phy.h
@@ -12,7 +12,7 @@
enum omap_control_phy_type {
OMAP_CTRL_TYPE_OTGHS = 1, /* Mailbox OTGHS_CONTROL */
OMAP_CTRL_TYPE_USB2, /* USB2_PHY, power down in CONTROL_DEV_CONF */
- OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL & seperate Rx/Tx power */
+ OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL & separate Rx/Tx power */
OMAP_CTRL_TYPE_PCIE, /* RX TX control of ACSPCIE */
OMAP_CTRL_TYPE_DRA7USB2, /* USB2 PHY, power and power_aux e.g. DRA7 */
OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */
diff --git a/include/linux/phy/phy-hdmi.h b/include/linux/phy/phy-hdmi.h
index d4cf4430ee8f..1d4b62475079 100644
--- a/include/linux/phy/phy-hdmi.h
+++ b/include/linux/phy/phy-hdmi.h
@@ -19,6 +19,10 @@ enum phy_hdmi_mode {
* @tmds_char_rate: HDMI TMDS Character Rate in Hertz.
* @frl.rate_per_lane: HDMI FRL Rate per Lane in Gbps.
* @frl.lanes: HDMI FRL lanes count.
+ * @frl.ffe_level: Transmitter Feed Forward Equalizer Level.
+ * Optional, only meaningful when set_ffe_level flag is on.
+ * @frl.set_ffe_level: Flag indicating whether or not to reconfigure ffe_level.
+ * All the other struct fields must be ignored when this is used.
*
* This structure is used to represent the configuration state of a HDMI phy.
*/
@@ -29,6 +33,8 @@ struct phy_configure_opts_hdmi {
struct {
u8 rate_per_lane;
u8 lanes;
+ u8 ffe_level;
+ u8 set_ffe_level : 1;
} frl;
};
};
diff --git a/include/linux/phy/phy-thunderbolt.h b/include/linux/phy/phy-thunderbolt.h
new file mode 100644
index 000000000000..5f48059814e1
--- /dev/null
+++ b/include/linux/phy/phy-thunderbolt.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __PHY_TBT_H_
+#define __PHY_TBT_H_
+
+enum tbt_phy_submode {
+ PHY_SUBMODE_TBT3,
+ PHY_SUBMODE_USB4,
+};
+
+#endif
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index 14b924a88411..c480d6cb42c5 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -20,6 +20,7 @@
#include <linux/phy/phy-hdmi.h>
#include <linux/phy/phy-lvds.h>
#include <linux/phy/phy-mipi-dphy.h>
+#include <linux/phy/phy-thunderbolt.h>
struct phy;
@@ -45,6 +46,7 @@ enum phy_mode {
PHY_MODE_LVDS,
PHY_MODE_DP,
PHY_MODE_HDMI,
+ PHY_MODE_TBT,
};
enum phy_media {