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authorIvan Lipski <ivan.lipski@amd.com>2026-10-28 11:11:11 -0400
committerAlex Deucher <alexander.deucher@amd.com>2026-11-11 15:53:14 -0500
commitd489c42c9bd542b3fbbda97b97dc9a0b07010eb3 (patch)
treece7779432dc0b935d7ba8fdaff5b665a8bfd9cab /drivers/gpu
parent7475ea8b58616b33c04afb976cf0fbaad9dd63fb (diff)
downloadlinux-d489c42c9bd542b3fbbda97b97dc9a0b07010eb3.tar.gz
linux-d489c42c9bd542b3fbbda97b97dc9a0b07010eb3.zip
drm/amd/display: Fix __udivdi3 link error in DCN6 DML2
[Why&How] dchub_v2_get_sop_total_available_bandwidth_KBps() and dchub_v2_is_qos_bandwidth_supported_by_sop() divide 64-bit integers by 100. On 32-bit builds this emits a call to __udivdi3, which the kernel does not link. Use double-cast division instead. Fixes: 7f7d7ea1fa51 ("drm/amd/display: Add new sources for DCN6") Cc: Linlin Yang <yanglinlin@kylinos.cn> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 83e7c8cb33363f2a2f893758c630f9a805ac4573) Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v2.h32
-rw-r--r--drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v3.h2
2 files changed, 17 insertions, 17 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v2.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v2.h
index ebca5ddda284..32049c17c080 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v2.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v2.h
@@ -58,27 +58,27 @@ static inline void dchub_v2_get_sop_total_available_bandwidth_KBps(
{
const struct utm_soc_operating_point *sop = &model->sops[sop_index];
const struct utm_qos_model_socbb *socbb = &model->socbb;
- uint64_t dram_available_bandwidth_KBps_nominal;
- uint64_t fabric_available_bandwidth_KBps_nominal;
- uint64_t dram_available_bandwidth_KBps_urgent;
- uint64_t fabric_available_bandwidth_KBps_urgent;
+ double dram_available_bandwidth_KBps_nominal;
+ double fabric_available_bandwidth_KBps_nominal;
+ double dram_available_bandwidth_KBps_urgent;
+ double fabric_available_bandwidth_KBps_urgent;
- dram_available_bandwidth_KBps_nominal = (uint64_t) sop->uclk_khz
+ dram_available_bandwidth_KBps_nominal = (double) sop->uclk_khz
* socbb->dram_channel_count
* socbb->dram_channel_width_bytes
* socbb->dram_transactions_per_clock
- * socbb->dram_derate_percent_nominal / 100;
- dram_available_bandwidth_KBps_urgent = (uint64_t) sop->uclk_khz
+ * socbb->dram_derate_percent_nominal / 100.0;
+ dram_available_bandwidth_KBps_urgent = (double) sop->uclk_khz
* socbb->dram_channel_count
* socbb->dram_channel_width_bytes
* socbb->dram_transactions_per_clock
- * socbb->dram_derate_percent_urgent / 100;
- fabric_available_bandwidth_KBps_nominal = (uint64_t) sop->fclk_khz
+ * socbb->dram_derate_percent_urgent / 100.0;
+ fabric_available_bandwidth_KBps_nominal = (double) sop->fclk_khz
* socbb->fabric_datapath_to_dcn_data_return_bytes
- * socbb->fabric_derate_percent_nominal / 100;
- fabric_available_bandwidth_KBps_urgent = (uint64_t) sop->fclk_khz
+ * socbb->fabric_derate_percent_nominal / 100.0;
+ fabric_available_bandwidth_KBps_urgent = (double) sop->fclk_khz
* socbb->fabric_datapath_to_dcn_data_return_bytes
- * socbb->fabric_derate_percent_urgent / 100;
+ * socbb->fabric_derate_percent_urgent / 100.0;
total_available_bandwidth->nominal_bandwidth_KBps =
dram_available_bandwidth_KBps_nominal < fabric_available_bandwidth_KBps_nominal ?
@@ -99,8 +99,8 @@ static inline bool dchub_v2_is_qos_bandwidth_supported_by_sop(
{
struct utm_qos_model_dchub_memory_path_bandwidth_v2 available_bandwidth = {0};
const struct utm_qos_model_dchub_v2 *dchub = model->dchub_v2;
- uint64_t nominal_available_bandwidth_KBps;
- uint64_t urgent_available_bandwidth_KBps;
+ double nominal_available_bandwidth_KBps;
+ double urgent_available_bandwidth_KBps;
if (nominal_utm_budget_percent > dchub->max_nominal_utm_budget_percent ||
nominal_utm_budget_percent < dchub->min_nominal_utm_budget_percent ||
@@ -112,9 +112,9 @@ static inline bool dchub_v2_is_qos_bandwidth_supported_by_sop(
nominal_available_bandwidth_KBps = available_bandwidth.nominal_bandwidth_KBps;
urgent_available_bandwidth_KBps = available_bandwidth.urgent_bandwidth_KBps;
- if ((nominal_available_bandwidth_KBps * nominal_utm_budget_percent / 100) < qos_bandwidth->nominal_bandwidth_KBps)
+ if ((nominal_available_bandwidth_KBps * nominal_utm_budget_percent / 100.0) < qos_bandwidth->nominal_bandwidth_KBps)
return false;
- else if ((urgent_available_bandwidth_KBps * urgent_utm_budget_percent / 100) < qos_bandwidth->urgent_bandwidth_KBps)
+ else if ((urgent_available_bandwidth_KBps * urgent_utm_budget_percent / 100.0) < qos_bandwidth->urgent_bandwidth_KBps)
return false;
else
return true;
diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v3.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v3.h
index 9390cad31691..fef7b1dc3060 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v3.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/utm_qos_model_dchub_v3.h
@@ -50,4 +50,4 @@ struct utm_qos_model_dchub_v3 {
sops[UTM_QOS_MODEL_V3_MAX_LOAD_LEVEL_COUNT][UTM_QOS_MODEL_V3_MAX_SOP_COUNT];
};
-#endif /* #ifndef UTM_QOS_MODEL_DCHUB_V3_H */ \ No newline at end of file
+#endif /* #ifndef UTM_QOS_MODEL_DCHUB_V3_H */