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| author | Daniel Charles <daniel.charles@intel.com> | 2026-11-02 18:14:17 -0800 |
|---|---|---|
| committer | Matthew Brost <matthew.brost@intel.com> | 2026-11-11 23:57:24 -0800 |
| commit | a17c5ed0dc715d2e39d00e33372cb094209ac8ef (patch) | |
| tree | 4183e5556c5a0ece71a57179ecb248604ef0b9a3 /drivers/gpu | |
| parent | 0d2d3dce0f529d8cee77f3e098bdf7712c5f6a0d (diff) | |
| download | linux-a17c5ed0dc715d2e39d00e33372cb094209ac8ef.tar.gz linux-a17c5ed0dc715d2e39d00e33372cb094209ac8ef.zip | |
drm/xe/pm: Apply tile workarounds after PCODE initialization
Tile workarounds program SoC registers through MMIO. Wait for PCODE
initialization to complete before applying them during system resume,
since MMIO access may be blocked until SoC initialization completes.
Also apply tile workarounds after PCODE initialization on D3cold runtime
resume, so their register settings are restored after power loss. Keep
both paths ordered before early GT resume.
Fixes: 0d0534750f9d ("drm/xe/wa: Apply tile workarounds at probe/resume")
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20261103021418.654723-2-daniel.charles@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
(cherry picked from commit 641ffb2132839242e49a158d2aea579a75fa2e8e)
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pm.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index b25f3ff7d259..d95f0d128ed4 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -241,13 +241,13 @@ int xe_pm_resume(struct xe_device *xe) drm_dbg(&xe->drm, "Resuming device\n"); trace_xe_pm_resume(xe, __builtin_return_address(0)); - for_each_tile(tile, xe, id) - xe_wa_apply_tile_workarounds(tile); - err = xe_pcode_ready(xe, true); if (err) return err; + for_each_tile(tile, xe, id) + xe_wa_apply_tile_workarounds(tile); + for_each_gt(gt, xe, id) xe_gt_idle_disable_c6(gt); @@ -687,6 +687,7 @@ out: */ int xe_pm_runtime_resume(struct xe_device *xe) { + struct xe_tile *tile; struct xe_gt *gt; u8 id; int err = 0; @@ -702,6 +703,9 @@ int xe_pm_runtime_resume(struct xe_device *xe) if (err) goto out; + for_each_tile(tile, xe, id) + xe_wa_apply_tile_workarounds(tile); + for_each_gt(gt, xe, id) xe_gt_idle_disable_c6(gt); |