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/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __SOC_MEDIATEK_MT8167_MMSYS_H
#define __SOC_MEDIATEK_MT8167_MMSYS_H
#define MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN 0x030
#define MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN 0x038
#define MT8167_DISP_REG_CONFIG_DISP_UFOE_MOUT_EN 0x03c
#define MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0x058
#define MT8167_DISP_REG_CONFIG_DISP_WDMA0_SEL_IN 0x05c
#define MT8167_DISP_REG_CONFIG_DISP_UFOE_SEL_IN 0x060
#define MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN 0x064
#define MT8167_DISP_REG_CONFIG_DISP_DPI0_SEL_IN 0x068
#define MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN 0x06c
#define MT8167_DISP_REG_CONFIG_DISP_RDMA1_SOUT_SEL_IN 0x070
#define MT8167_DISP_REG_CONFIG_DISP_DPI1_SEL_IN 0x074
#define MT8167_OVL0_MOUT_EN_COLOR0 0x1
#define MT8167_OVL0_MOUT_EN_WDMA0 0x2
#define MT8167_OVL0_MOUT_EN_MASK 0x3
#define MT8167_DITHER_MOUT_EN_RDMA0 0x1
#define MT8167_DITHER_MOUT_EN_UFOE 0x2
#define MT8167_DITHER_MOUT_EN_WDMA0 0x4
#define MT8167_DITHER_MOUT_EN_MASK 0x7
#define MT8167_UFOE_MOUT_EN_DSI0 0x1
#define MT8167_UFOE_MOUT_EN_DPI0 0x2
/*
* For some reason Android sources and the data sheet don't agree here,
* the data sheet has UFOE_MOUT_EN_WDMA0 as 0x4 and does not mention DPI1.
*/
#define MT8167_UFOE_MOUT_EN_DPI1 0x4
#define MT8167_UFOE_MOUT_EN_WDMA0 0x8
#define MT8167_UFOE_MOUT_EN_MASK 0xF
#define MT8167_COLOR0_SEL_IN_RDMA0 0x0
#define MT8167_COLOR0_SEL_IN_OVL0 0x1
#define MT8167_COLOR0_SEL_IN_MASK 0x1
#define MT8167_WDMA0_SEL_IN_OVL0 0x0
#define MT8167_WDMA0_SEL_IN_DITHER 0x1
#define MT8167_WDMA0_SEL_IN_UFOE 0x2
#define MT8167_WDMA0_SEL_IN_MASK 0x3
#define MT8167_UFOE_SEL_IN_RDMA0 0x0
#define MT8167_UFOE_SEL_IN_DITHER 0x1
#define MT8167_UFOE_SEL_IN_MASK 0x1
#define MT8167_DSI0_SEL_IN_UFOE 0x0
#define MT8167_DSI0_SEL_IN_RDMA0 0x1
#define MT8167_DSI0_SEL_IN_RDMA1 0x2
#define MT8167_DSI0_SEL_IN_MASK 0x3
#define MT8167_DPI0_SEL_IN_UFOE 0x0
#define MT8167_DPI0_SEL_IN_RDMA0 0x1
#define MT8167_DPI0_SEL_IN_RDMA1 0x2
#define MT8167_DPI0_SEL_IN_MASK 0x3
#define MT8167_DPI1_SEL_IN_UFOE 0x0
#define MT8167_DPI1_SEL_IN_RDMA0 0x1
#define MT8167_DPI1_SEL_IN_RDMA1 0x2
#define MT8167_DPI1_SEL_IN_MASK 0x3
#define MT8167_RDMA0_SOUT_UFOE 0x0
#define MT8167_RDMA0_SOUT_COLOR0 0x1
#define MT8167_RDMA0_SOUT_DSI0 0x2
#define MT8167_RDMA0_SOUT_DPI0 0x3
/* DPI1 is only defined in Android sources, not in the data sheet */
#define MT8167_RDMA0_SOUT_DPI1 0x4
#define MT8167_RDMA0_SOUT_MASK 0x7
#define MT8167_RDMA1_SOUT_DSI0 0x0
#define MT8167_RDMA1_SOUT_DPI0 0x1
/* DPI1 is only defined in Android sources, not in the data sheet */
#define MT8167_RDMA1_SOUT_DPI1 0x2
#define MT8167_RDMA1_SOUT_MASK 0x3
static const struct mtk_mmsys_routes mt8167_mmsys_routing_table[] = {
/* OVL0<->COLOR0 */
MMSYS_ROUTE(OVL, 0, COLOR, 0,
MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, MT8167_OVL0_MOUT_EN_MASK,
MT8167_OVL0_MOUT_EN_COLOR0),
MMSYS_ROUTE(OVL, 0, COLOR, 0,
MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN, MT8167_COLOR0_SEL_IN_MASK,
MT8167_COLOR0_SEL_IN_OVL0),
/* OVL0<->WDMA0 */
MMSYS_ROUTE(OVL, 0, WDMA, 0,
MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, MT8167_OVL0_MOUT_EN_MASK,
MT8167_OVL0_MOUT_EN_WDMA0),
MMSYS_ROUTE(OVL, 0, WDMA, 0,
MT8167_DISP_REG_CONFIG_DISP_WDMA0_SEL_IN, MT8167_COLOR0_SEL_IN_MASK,
MT8167_WDMA0_SEL_IN_OVL0),
/* DITHER0 outputs */
MMSYS_ROUTE(DITHER, 0, RDMA, 0,
MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_MASK,
MT8167_DITHER_MOUT_EN_RDMA0),
MMSYS_ROUTE(DITHER, 0, UFOE, 0,
MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_MASK,
MT8167_DITHER_MOUT_EN_UFOE),
MMSYS_ROUTE(DITHER, 0, WDMA, 0,
MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_MASK,
MT8167_DITHER_MOUT_EN_WDMA0),
/* UFOE<->DSI0 */
MMSYS_ROUTE(UFOE, 0, DSI, 0,
MT8167_DISP_REG_CONFIG_DISP_UFOE_MOUT_EN, MT8167_UFOE_MOUT_EN_MASK,
MT8167_UFOE_MOUT_EN_DSI0),
MMSYS_ROUTE(UFOE, 0, DSI, 0,
MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN, MT8167_DSI0_SEL_IN_MASK,
MT8167_DSI0_SEL_IN_UFOE),
/* UFOE<->DPI0 */
MMSYS_ROUTE(UFOE, 0, DPI, 0,
MT8167_DISP_REG_CONFIG_DISP_UFOE_MOUT_EN, MT8167_UFOE_MOUT_EN_MASK,
MT8167_UFOE_MOUT_EN_DPI0),
MMSYS_ROUTE(UFOE, 0, DPI, 0,
MT8167_DISP_REG_CONFIG_DISP_DPI0_SEL_IN, MT8167_DPI0_SEL_IN_MASK,
MT8167_DPI0_SEL_IN_UFOE),
/* UFOE<->DPI1 */
MMSYS_ROUTE(UFOE, 0, DPI, 1,
MT8167_DISP_REG_CONFIG_DISP_UFOE_MOUT_EN, MT8167_UFOE_MOUT_EN_MASK,
MT8167_UFOE_MOUT_EN_DPI1),
MMSYS_ROUTE(UFOE, 0, DPI, 1,
MT8167_DISP_REG_CONFIG_DISP_DPI1_SEL_IN, MT8167_DPI1_SEL_IN_MASK,
MT8167_DPI1_SEL_IN_UFOE),
/* UFOE<->WDMA0 */
MMSYS_ROUTE(UFOE, 0, WDMA, 0,
MT8167_DISP_REG_CONFIG_DISP_UFOE_MOUT_EN, MT8167_UFOE_MOUT_EN_MASK,
MT8167_UFOE_MOUT_EN_WDMA0),
MMSYS_ROUTE(UFOE, 0, WDMA, 0,
MT8167_DISP_REG_CONFIG_DISP_WDMA0_SEL_IN, MT8167_WDMA0_SEL_IN_MASK,
MT8167_WDMA0_SEL_IN_UFOE),
/* RDMA0<->UFOE */
MMSYS_ROUTE(RDMA, 0, UFOE, 0,
MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_MASK,
MT8167_RDMA0_SOUT_UFOE),
MMSYS_ROUTE(RDMA, 0, UFOE, 0,
MT8167_DISP_REG_CONFIG_DISP_UFOE_SEL_IN, MT8167_UFOE_SEL_IN_MASK,
MT8167_UFOE_SEL_IN_RDMA0),
/* RDMA0->COLOR0 */
MMSYS_ROUTE(RDMA, 0, COLOR, 0,
MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_MASK,
MT8167_RDMA0_SOUT_COLOR0),
MMSYS_ROUTE(RDMA, 0, COLOR, 0,
MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN, MT8167_COLOR0_SEL_IN_MASK,
MT8167_COLOR0_SEL_IN_RDMA0),
/* RDMA0<->DSI0 */
MMSYS_ROUTE(RDMA, 0, DSI, 0,
MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_MASK,
MT8167_RDMA0_SOUT_DSI0),
MMSYS_ROUTE(RDMA, 0, DSI, 0,
MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN, MT8167_DSI0_SEL_IN_MASK,
MT8167_DSI0_SEL_IN_RDMA0),
/* RDMA0<->DPI0 */
MMSYS_ROUTE(RDMA, 0, DPI, 0,
MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_MASK,
MT8167_RDMA0_SOUT_DPI0),
MMSYS_ROUTE(RDMA, 0, DPI, 0,
MT8167_DISP_REG_CONFIG_DISP_DPI0_SEL_IN, MT8167_DPI0_SEL_IN_MASK,
MT8167_DPI0_SEL_IN_RDMA0),
/* RDMA0<->DPI1 */
MMSYS_ROUTE(RDMA, 0, DPI, 1,
MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_MASK,
MT8167_RDMA0_SOUT_DPI1),
MMSYS_ROUTE(RDMA, 0, DPI, 1,
MT8167_DISP_REG_CONFIG_DISP_DPI1_SEL_IN, MT8167_DPI1_SEL_IN_MASK,
MT8167_DPI1_SEL_IN_RDMA0),
/* RDMA1<->DSI0 */
MMSYS_ROUTE(RDMA, 1, DSI, 0,
MT8167_DISP_REG_CONFIG_DISP_RDMA1_SOUT_SEL_IN, MT8167_RDMA1_SOUT_MASK,
MT8167_RDMA1_SOUT_DSI0),
MMSYS_ROUTE(RDMA, 1, DSI, 0,
MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN, MT8167_DSI0_SEL_IN_MASK,
MT8167_DSI0_SEL_IN_RDMA1),
/* RDMA1<->DPI0 */
MMSYS_ROUTE(RDMA, 1, DPI, 0,
MT8167_DISP_REG_CONFIG_DISP_RDMA1_SOUT_SEL_IN, MT8167_RDMA1_SOUT_MASK,
MT8167_RDMA1_SOUT_DPI0),
MMSYS_ROUTE(RDMA, 1, DPI, 0,
MT8167_DISP_REG_CONFIG_DISP_DPI0_SEL_IN, MT8167_DPI0_SEL_IN_MASK,
MT8167_DPI0_SEL_IN_RDMA1),
/* RDMA1<->DPI1 */
MMSYS_ROUTE(RDMA, 1, DPI, 1,
MT8167_DISP_REG_CONFIG_DISP_RDMA1_SOUT_SEL_IN, MT8167_RDMA1_SOUT_MASK,
MT8167_RDMA1_SOUT_DPI1),
MMSYS_ROUTE(RDMA, 1, DPI, 1,
MT8167_DISP_REG_CONFIG_DISP_DPI1_SEL_IN, MT8167_DPI1_SEL_IN_MASK,
MT8167_DPI1_SEL_IN_RDMA1),
};
#endif /* __SOC_MEDIATEK_MT8167_MMSYS_H */
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