1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright 2025 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __RAS_MP1_H__
#define __RAS_MP1_H__
#include "ras.h"
#define MAX_UE_BANKS_PER_QUERY 12
#define MAX_CE_BANKS_PER_QUERY 12
enum ras_mp1_feature_id {
RAS_MP1_FEATURE_PMFW_EEPROM,
RAS_MP1_FEATURE_MAX
};
enum ras_mp1_msg_id {
RAS_MP1_MSG_QueryValidMcaCount,
RAS_MP1_MSG_McaBankDumpDW,
RAS_MP1_MSG_ClearMcaOnRead,
RAS_MP1_MSG_QueryValidMcaCeCount,
RAS_MP1_MSG_McaBankCeDumpDW,
RAS_MP1_MSG_GetRasTableVersion,
RAS_MP1_MSG_GetRmaStatus,
RAS_MP1_MSG_GetBadPageCount,
RAS_MP1_MSG_GetBadPageMcaAddr,
RAS_MP1_MSG_GetBadPagePaAddr,
RAS_MP1_MSG_SetTimestamp,
RAS_MP1_MSG_GetTimestamp,
RAS_MP1_MSG_GetRasPolicy,
RAS_MP1_MSG_GetBadPageIpId,
RAS_MP1_MSG_EraseRasTable,
RAS_MP1_MSG_MAX
};
struct eeprom_err_record {
union {
struct {
u32 timestamp_low;
u32 timestamp_high;
};
u64 timestamp;
};
union {
struct {
u32 mca_addr_low;
u32 mca_addr_high;
};
u64 mca_addr;
};
union {
struct {
u32 ipid_low;
u32 ipid_high;
};
u64 ipid;
};
};
enum ras_err_type;
struct ras_mp1_ip_func {
int (*get_valid_bank_count)(struct ras_core_context *ras_core,
enum ras_err_type type, u32 *count);
int (*dump_valid_bank)(struct ras_core_context *ras_core,
enum ras_err_type type, u32 idx, u64 *regs, u32 regs_sz);
int (*set_debug_mode)(struct ras_core_context *ras_core, bool enable);
/* The following is used for firmware management of EEPROM */
int (*get_table_version)(struct ras_core_context *ras_core,
u32 *table_version);
bool (*rma_detected)(struct ras_core_context *ras_core);
int (*set_timestamp)(struct ras_core_context *ras_core,
u64 timestamp);
int (*reset_ras_table)(struct ras_core_context *ras_core,
u32 *result);
int (*get_record_count)(struct ras_core_context *ras_core,
u32 *count);
int (*get_record)(struct ras_core_context *ras_core,
u32 idx, struct eeprom_err_record *rec);
};
struct ras_mp1 {
uint32_t mp1_ip_version;
const struct ras_mp1_ip_func *ip_func;
const struct ras_mp1_sys_func *sys_func;
struct mutex op_mutex;
};
int ras_mp1_sw_init(struct ras_core_context *ras_core);
int ras_mp1_sw_fini(struct ras_core_context *ras_core);
int ras_mp1_get_bank_count(struct ras_core_context *ras_core,
enum ras_err_type type, u32 *count);
int ras_mp1_dump_bank(struct ras_core_context *ras_core,
u32 ecc_type, u32 idx, u64 *regs, u32 regs_sz);
int ras_mp1_set_debug_mode(struct ras_core_context *ras_core, bool enable);
int ras_mp1_get_table_version(struct ras_core_context *ras_core,
u32 *table_version);
bool ras_mp1_rma_detected(struct ras_core_context *ras_core);
int ras_mp1_set_timestamp(struct ras_core_context *ras_core,
u64 timestamp);
int ras_mp1_reset_ras_table(struct ras_core_context *ras_core,
u32 *result);
int ras_mp1_get_record_count(struct ras_core_context *ras_core, u32 *count);
int ras_mp1_get_record(struct ras_core_context *ras_core,
u32 idx, struct eeprom_err_record *rec);
int ras_mp1_check_feature_status(struct ras_core_context *ras_core,
enum ras_mp1_feature_id feature_id, u32 *status);
#endif
|
