| Age | Commit message (Collapse) | Author |
|---|
|
|
|
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux.git
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git
# Conflicts:
# arch/arm64/include/asm/ptrace.h
# arch/arm64/include/asm/sysreg.h
# arch/arm64/kvm/hyp/nvhe/hyp-main.c
|
|
* kvm-arm64/selftests-7.4:
: \
: Various fixes for selftests:
:
: - Render sea_to_user less braindead, though the utility of the test
: itself is still debatable
:
: - Correctly skip testing FEAT_EASE when the feature isn't available
:
: - Check for consumption of a pended SError
: /
KVM: arm64: selftests: Check the pending SError state in external_aborts
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
None of the external abort tests look at the vCPU events once the guest
is done, so an SError left pending after the guest took it, or dropped
while the guest had it masked, goes unnoticed.
Read the vCPU events back at the end of every test that runs the guest.
The SError must still be pending in the masked case, with the injected
ESR when the vCPU has RAS, and no SError, injected or spurious, may be
pending in any of the others.
Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
Tested-by: Itaru Kitayama <itaru.kitayama@fujitsu.com>
Reviewed-by: Oliver Upton <oupton@kernel.org>
Link: https://patch.msgid.link/20261006092841.2202109-1-fuad.tabba@linux.dev
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
* kvm-arm64/misc-7.4:
: \
: Misc KVM/arm64 fixes for 7.4:
:
: - Correctly report SMCCC_VERSION and SMCCC_ARCH_FEATURES as implemented
:
: - Don't register a page table dumper for pKVM VMs, as S2 is not
: accessible when in protected mode
:
: - Drop PAGE_SIZE alignment requirement for hyp trace event sections
:
: - Tighten PMUv3 being disabled for the guest even if vcpus were created
: with one.
:
: - Fix timer emulation when the HW doesn't support offsetting of the
: counter.
: /
KVM: arm64: selftests: Test a timer set past the counter's wrap
KVM: arm64: nv: Read a guest hypervisor's CNTV_CVAL_EL0 from memory on x1e
KVM: arm64: timers: Compute an offset-applied CVAL from the current count
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
Program an unmasked timer whose cval sits within long_wait_ms of the
counter's wrap while the guest's counter is at wait_ms, and expect no
interrupt. The guest's counter can't reach it, but a host that applies
the timer's offset by adding it to cval wraps the sum into the past,
and the timer fires at once. The one existing case with a cval past the
wrap, in the sanity checks, runs with the timer masked, so it gets no
interrupt either way.
Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
Link: https://patch.msgid.link/20261007074343.324269-4-fuad.tabba@linux.dev
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
* kvm-arm64/rd-assignment-fixes:
: \
: Fixes for failed GICv3 RD assignment to vcpu rollback.
:
: Patches by Karl Mehltretter.
: /
KVM: arm64: selftests: Test VGICv3 redistributor region retry
KVM: arm64: selftests: Pass guest code to vm_gic_create_with_vcpus()
KVM: arm64: vgic-v3: Roll back assignments from the new region
KVM: arm64: vgic-v3: Undo assignment on iodev registration failure
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
A failed REDIST_REGION write can remove redistributor iodevs without
clearing their cached vCPU assignments. A retry then skips those
assignments and leaves the redistributors absent from the MMIO bus.
Create two partial regions, reject a third region that overlaps the
distributor, and retry at a valid address. After initializing the VGIC,
have the guest read GICR_TYPER from all four redistributors and check their
processor numbers. This verifies the final configuration without assuming
that assignments survive the failed write.
Keep the redistributor IPAs outside the guest RAM memslot and install only
the stage-1 mappings needed for the MMIO accesses. If an iodev is missing,
KVM_RUN therefore exits with KVM_EXIT_MMIO. Without the fix, the first
redistributor access exits at 0x8030008.
Assisted-by: Codex:gpt-5.6-sol
Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com>
Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev>
Tested-by: Fuad Tabba <fuad.tabba@linux.dev>
Link: https://patch.msgid.link/20260831081005.41346-5-kmehltretter@gmail.com
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
Pass the guest-code address to vm_gic_create_with_vcpus(), and use
guest_code at the existing call sites. This lets tests with different guest
code reuse the common VM and VGIC setup while retaining the void *
interface of vm_create_with_vcpus().
Assisted-by: Codex:gpt-5.6-sol
Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com>
Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev>
Tested-by: Fuad Tabba <fuad.tabba@linux.dev>
Link: https://patch.msgid.link/20260831081005.41346-4-kmehltretter@gmail.com
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
* selftests: (83 commits)
KVM: selftests: Spell out UCALL in nested TSC scaling test's enums
KVM: selftests: Use GUEST_SYNC2() in nested TSC scaling test
KVM: selftests: Randomize L2's TSC offset in the nested TSC scaling test
KVM: selftests: Test non-zero TSC offset on SVM in nested TSC scaling test
KVM: selftests: Verify that KVM saturates L2 TSC freq on {under,over}flow
KVM: selftests: Test L1 "up" and L2 "down" in nested TSC scaling test
KVM: selftests: Sanity check KVM's default TSC freq in nested TSC scaling test
KVM: selftests: Explicitly pass TSC frequencies to guts of TSC scaling test
KVM: selftests: Use KVM's reported TSC KHz as L0's frequency (sanity checked)
KVM: selftests: Allow +/- 1 tolerance if expected TSC frequency is <100
KVM: selftests: Print out the failing L{0,1,2} level in nested TSC scaling test
KVM: selftests: Track L2 multiplier, not scale-up factor, in nested TSC test
KVM: selftests: Extract guts of nested TSC scaling test to helper function
KVM: selftests: Rename TSC freq checkers in nested TSC scaling test
KVM: selftests: Randomize L2's scale factor in nested TSC scaling test
KVM: selftests: Drop unnecessary use of PRIu64 in nested TSC scaling test
KVM: selftests: Drop redundant VMWRITE of TSC_MULTIPLIER_HIGH
KVM: selftests: Use KVM's pRNG to randomize L1's TSC ratio in TSC scaling test
KVM: x86: Allow userspace to set KVM's max supported guest TSC frequency
KVM: SVM: Fallback to the default TSC ratio if KVM tries to use a bad multiplier
...
|
|
* misc: (45 commits)
KVM: x86: Request event processing for exception VM-Exits
KVM: selftests: Add coverage for the EFER_LMSLE_MBZ defeature
KVM: selftests: Add module param API to check if nested virtualization is enabled
KVM: selftests: Rename svm_nested_clear_efer_svme to svm_nested_efer_test
KVM: x86: Honor the guest's EFER_LMSLE_MBZ
KVM: x86: Advertise EFER_LMSLE_MBZ when KVM disallows EFER.LMSLE
KVM: SVM: Add support for virtualizating Bus Lock Detect
KVM: SVM: Add a vCPU-aware helper to get supported DEBUGCTL bits
KVM: nSVM: Don't assume all active-low bits DR6 are fixed-1
KVM: nSVM: Open code check on LBR virtualization being enabled in vmcb12
KVM: nSVM: Disable LBRV in nested control cache when unsupported
KVM: SVM: Add helper to query if LBR virtualization needs to be enabled
KVM: x86: Kill off DR6_FIXED_1 to prevent future misuse
KVM: x86: Set guest's fixed-1 DR6 bits when delivering #DB payload
KVM: x86: Force fixed-1 bits in DR6 after synchronizing with hardware
KVM: Return an "unsigned long", not "u64" for the fixed-1 DR6 bits
KVM: x86: Rename kvm_dr6_fixed() => kvm_get_dr6_fixed_1()
KVM: x86: Preserve DR6.BLD (Bus Lock Detect) when delivering #DB payload
KVM: x86: Restrict saved GPA writes to hardware write faults
KVM: x86/pmu: Don't retry a counter whose config was rejected
...
|
|
* fixes: (69 commits)
KVM: x86: Use active memslots for the per-vCPU MMIO cache
KVM: SEV: Fix page dirtying in sev_gmem_post_populate()
KVM: SVM: Clear AVIC Physical ID table entry if vCPU creation fails
KVM: SVM: Use "is AVIC-addressable" helper to sanity check load()/put()
KVM: SVM: Add paranoid helper for checking if vCPU is AVIC-addressable
KVM: SEV: Do cache maintenance on the source VM *before* clearing SEV state
KVM: SEV: Nullify "have run CPUs" mask pointer when freeing it
KVM: selftests: Extend nested x2APIC test to validate using eVMCS for vmcs12
KVM: selftests: Extend nested x2APIC test to validate disabling x2APIC virt
KVM: selftests: Verify that L0's TPR doesn't get clobbered
KVM: selftests: Run the nested x2APIC with and without APICv being inhibited in L2
KVM: selftests: Add x2APIC MSR test for inhibiting APICv while nested
KVM: nVMX: Force MSR bitmap refresh if runtime eVMCS controls are modified
KVM: SVM: Use the active VMCB's MSR bitmap when checking if MSR is intercepted
KVM: SVM: Sync guest's PERF_CNTR_GLOBAL_CTL from h/w only on successful VMRUN
KVM: SVM: Don't mark ASID fields as dirty when setting control.tlb_ctl
KVM: SVM: Update control fields on #VMEXIT if and only if VMRUN succeeded
KVM: SVM: Preserve TLB control (i.e. pending TLB flush) on failed VMRUN
KVM: x86/mmu: Bail from shadow walks if the root is invalid or a dummy
KVM: WARN if vCPU creation is in-progress when locking all vCPUs
...
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 7.3, round #2
- Take a reference on the last IRQ loaded into an LR to prevent it
from being freed while running the guest (Marc Zyngier)
- Ensure that the ITS MOVALL command only affects LPIs that were
previously affined to the source redistributor (Marc Zyngier)
- Fix + test for honoring the host's trap configuration when running
non-protected VMs while KVM is in protected mode (Fuad Tabba)
- Use the host stage-1 mapping granularity for VM_PFNMAP mappings at
stage-2 (Mostafa Saleh)
|
|
* kvm-arm64/immutable-idregs-7.4:
: \
: Make ID registers immutable as soon as a vcpu has had a chance of
: running, preventing userspace from altering them from under the guest's
: feet. Patches courtesy of Mark Brown, selftest improvements by Fuad Tabba.
: /
KVM: arm64: selftests: Check ID regs are immutable after a failed run
KVM: arm64: Block ID register changes after we rely on the values
KVM: arm64: Finalize guest-wide sysregs prior to per-vCPU sysregs
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
* kvm-arm64/misc-7.4:
: \
:
: Misc KVM/arm64 for 7.4:
:
: - Correctly report SMCCC_VERSION and SMCCC_ARCH_FEATURES as implemented
:
: - Don't register a page table dumper for pKVM VMs, as S2 is not
: accessible when in protected mode
:
: - Drop PAGE_SIZE alignment requirement for hyp trace event sections
: /
KVM: arm64: Remove PAGE_SIZE alignment for hyp event ELF sections
KVM: arm64: Disable stage-2 ptdump of pKVM
KVM: arm64: selftests: Check the mandatory SMCCC_ARCH_FEATURES queries
KVM: arm64: Report SMCCC_VERSION and SMCCC_ARCH_FEATURES as implemented
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
* kvm-arm64/pre-faulting:
: \
: Enable stage-2 pre-faulting in the canonical IPA space, implementing the
: KVM_PRE_FAULT_MEMORY API. Patches courtesy of Lorenzo Stoakes, and based
: on an initial work by Jack Thomson.
: /
KVM: selftests: Add nested pre-fault test for arm64
KVM: selftests: Add option for different backing in pre-fault tests
KVM: selftests: Enable pre_fault_memory_test for arm64
Documentation: KVM: document arm64 KVM_PRE_FAULT_MEMORY
KVM: arm64: Implement KVM_PRE_FAULT_MEMORY
KVM: arm64: Pass walk flags to kvm_pgtable_get_leaf()
KVM: arm64: Propagate EHWPOISON in kvm_s2_fault_pin_pfn()
KVM: arm64: Size the stage-2 memcache from the fault MMU
KVM: arm64: Propagate and use kvm_s2_fault_result on S2 fault
KVM: arm64: Propagate and use mmu in s2fd when handling guest aborts
KVM: arm64: Propagate and use esr in s2fd when handling guest aborts
KVM: arm64: Use ESR helpers in guest abort handling
arm64: Add ESR fault helpers
KVM: Allow architectures to disallow pre-fault
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
* kvm-arm64/s2-rmap: (31 commits)
: \
: Add a per-shadow stage-2 reverse map tracking infrastructure,
: considerably reducing the overhead of MMU notifiers when running L2
: guests. Also fixes issues with the shadow S2 MMU debugfs infrastrtcture.
:
: Patches courtesy of Wei-Lin Chang.
:
: This branch drags the kvmarm-fixes-7.3-1 tag, as this series depends
: on some of the fixes.
: /
KVM: arm64: ptdump: Fix shadow ptdump sleep-in-atomic-context problem
KVM: arm64: ptdump: Check the page tables aren't freed when accessing
KVM: arm64: Refactor kvm_unmap_gfn_range() with common variables
KVM: arm64: nv: Drop kvm_s2_mmu pointer from kvm_guest_s2_mapping
KVM: arm64: nv: Avoid full shadow stage-2 unmap
KVM: arm64: nv: Track guest stage-2 mapping removal
KVM: arm64: nv: Track guest stage-2 mapping creation
KVM: arm64: nv: Introduce guest stage-2 tracking structures
KVM: arm64: Use a variable for the canonical IPA in kvm_s2_fault_map()
KVM: arm64: Fix AArch32 DBGBXVR<n> handling
KVM: arm64: Fix FGT mapping for HFGITR_EL2.nGCSEPP
KVM: selftests: fix steal_time for arm64 with host page size > 4K
KVM: arm64: Don't WARN on an unknown VM ioctl in protected mode
KVM: arm64: nv: Delay freeing of shadow S2 structures until VM destruction
KVM: arm64: nv: Fix life cycle of the nested_mmus array
KVM: arm64: Check every private mapping is hyp-owned at pKVM init
KVM: arm64: Move the private VA allocation cursor to __io_map_next
KVM: arm64: Match hyp text by physical address in fix_host_ownership()
KVM: arm64: Transfer the hyp stack pages out of the host stage-2
KVM: arm64: selftests: Test empty SMCCC filter range at base 0
...
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
* kvm-arm64/gicv5-7.4: (52 commits)
: \
: GICv5 IRS support, courtesy of Sascha Bischoff. From the cover letter:
:
: "This series builds on the initial vGICv5 support and adds support
: for the GICv5 IRS, as described by the GICv5 (EAC0) specification.
: With this, a GICv5 guest is no longer restricted to PPIs, and can make
: use of SPIs and LPIs as well."
: /
KVM: arm64: vgic-v5: Correctly handle host ISTE __le32 conversion
KVM: arm64: vgic-v5: Tidy-up programming of vpe descriptor address
KVM: arm64: vgic-v5: Correctly reset h_lpi_ist to NULL
KVM: arm64: vgic-v5: Drop __iomem attribute from {vmd,vpet}_base
KVM: selftests: Add VGICv5 sparse vCPU IDs test
KVM: selftests: Add VGICv5 IST save/restore coverage
KVM: selftests: Add VGICv5 LPI delivery tests
KVM: selftests: Add VGICv5 SPI injection tests
KVM: selftests: Add VGICv5 CPU sysreg attribute tests
KVM: selftests: Add VGICv5 USERSPACE_PPIS tests
KVM: selftests: Add VGICv5 IST attribute tests
KVM: selftests: Add VGICv5 IRS_REGS attribute tests
KVM: selftests: Add VGICv5 NR_IRQS attribute tests
KVM: selftests: Add VGICv5 IRS address attribute tests
Documentation: KVM: Add the VGICv5 IRS save/restore sequences
Documentation: KVM: Add docs for KVM_DEV_ARM_VGIC_GRP_IST
Documentation: KVM: Add KVM_DEV_ARM_VGIC_GRP_IRS_REGS to VGICv5 docs
Documentation: KVM: Document KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS for VGICv5
KVM: arm64: gic-v5: Implement save/restore mechanisms for ISTs
KVM: arm64: gic-v5: Add VGICv5 IST save/restore UAPI
...
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
Explicitly spell out UCALL instead of prefixing only U in the nested TSC
scaling test's ucall commands, as it's all too easy to think USLEEP means
"do usleep()", when it actually means "do sleep() in userspace".
Opportunistically name the enum and take an enum instead of a bare integer
for the to-be-checked level, to make it more obvious that the fact that
the level values happen to correspond to '1' and '2' for the nesting level
is largely coincidental (or perhaps it was intentional, but it's not a hard
requirement for the test).
Link: https://patch.msgid.link/20260930173635.3362655-22-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Use GUEST_SYNC2() instead of open coding equivalent functionality using
raw ucall() invocations in the nested TSC scaling test.
No functional change intended.
Link: https://patch.msgid.link/20260930173635.3362655-21-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Randomize L2's TSC offset in the nested TSC scaling test, not because it's
all that interesting, but because hardcoding a copmletely arbitrary value
is all kinds of silly.
Link: https://patch.msgid.link/20260930173635.3362655-20-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Set L2's TSC offset for SVM as well as VMX in the nested TSC scaling test.
Odds are good skipping SVM was pure oversight.
Fixes: e6bcdd212238 ("KVM: selftests: Extend vmx_nested_tsc_scaling_test to cover SVM")
Link: https://patch.msgid.link/20260930173635.3362655-19-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Extend the nested TSC scaling test to validate the extreme ends of what
hardware supports, i.e. validate that KVM allows L1 to scale L2's virtual
TSC frequency up/down to the architectural maximum/minimum, from L1's
perspective, and that KVM saturates L2's effective frequency when L2's
frequency can't be virtualized by hardware (which is possible when stacking
multipliers/ratios across L1 and L2).
Link: https://patch.msgid.link/20260930173635.3362655-18-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Now that the guts of the nested TSC scaling test support scaling L2 down,
validate all four combinations of scaling up/down L1 and L2. Ideally, the
test would also validate integer+fractional scale up scenarios, but
prioritize keeping the test and math somewhat understandable.
Opportunistically drop the stale file comment about the test's name.
Link: https://patch.msgid.link/20260930173635.3362655-17-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Explicitly verify that both L1 and L2 can run at KVM's default TSC
frequency reported via KVM_GET_TSC_KHZ, e.g. that KVM_SET_TSC_KHZ can take
in what KVM_GET_TSC_KHZ spits out.
Link: https://patch.msgid.link/20260930173635.3362655-16-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Explicitly pass the L1 and L2 TSC frequencies, along with the L2 multiplier,
to the main test routine in the nested TSC scaling test. This will allow
testing both "scale up" and "scale down" scenarios, and that KVM saturates
L2's frequency if it's scale up/down beyond what hardware can support, in
which case the expected frequency will not exactly match the L2 multiplier.
Link: https://patch.msgid.link/20260930173635.3362655-15-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Use KVM's reported default TSC frequency as L0's frequency instead of
calibrating L0's frequency using RDTSC. Trying to calibrate the frequency
in userspace is all but guaranteed to be wildly inaccurate, e.g. due to
interrupts, preemption, etc, and no known CPU supports TSC scaling without
also having a constant TSC. I.e. there's no need to calibrate the current
frequency, as it should also be the same as KVM's default frequency.
Opportunistically sanity check KVM's reported frequency against what is
observed via RDTSC, e.g. so that KVM_GET_TSC_KHZ or platform issues show up
much earlier in the test, before VMs get involved.
Link: https://patch.msgid.link/20260930173635.3362655-14-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Massage the nested TSC scaling test's checker to allow for validating an
expected TSC frequency of 1Hz, which is achievable for L2 since L1 can use
a completely arbitrary fractional ratio. To do so, set the minimum
tolerance to 1, and make the thresholds inclusive, i.e. for an expected
frequency of 1, allow the actual frequency to be in the range of [0,2].
Because scaling L2's frequency down to a single Hz makes the virtual TSC
run soooo comically slow, and because all of the math is done with basic
integer arithmetic, it's very easy for the test to observe what appears to
be a frequency of 0.
Link: https://patch.msgid.link/20260930173635.3362655-13-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Print out which one of L0, L1, or L2 TSC frequency checks failed if the
nested TSC scaling test detects an out-of-bounds frequency. Triaging test
failures without the level information is unnecessarily painful.
Link: https://patch.msgid.link/20260930173635.3362655-12-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Track L2's multiplier, not just the non-fractional scale-up factor, so that
the nested TSC scaling test can also validate scaling L2's frequency *down*.
No functional change intended.
Link: https://patch.msgid.link/20260930173635.3362655-11-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Extract the guts of the nested TSC scaling test to a separate helper in
anticipation of extending the test beyond its single "scale L1 up, L2 down"
testcase.
No functional change intended.
Link: https://patch.msgid.link/20260930173635.3362655-10-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Rename the nested TSC scaling test's helpers to clarify which one is used
by guest code and which one is used by host code, and to make it more
obvious that the host version *checks* the result and asserts on errors.
Contrary to what "compare" suggests, the helper doesn't return whether or
not the actual vs. expected values match.
Link: https://patch.msgid.link/20260930173635.3362655-9-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Randomize L2's scale factor in the nested TSC scaling test; the test's
comment that "using a global variable does not work" just means the author
didn't know how to use sync_global_to_guest().
Link: https://patch.msgid.link/20260930173635.3362655-8-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Use a plain "lu" instead of "PRIu64" to print u64s in the nested TSC
scaling test, as KVM selftests are 64-bit only (and supporting 32-bit x86
selftest would be an absurdly large lift, for something absolutely no one
cares about).
Link: https://patch.msgid.link/20260930173635.3362655-7-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Drop a redundant VMWRITE of TSC_MULTIPLIER_HIGH in the nested TSC scaling
test. KVM selftests are 64-bit only, i.e. the full 64-bit multiplier is
always written by setting TSC_MULTIPLIER.
Link: https://patch.msgid.link/20260930173635.3362655-6-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Use KVM's pRNG to randomize L1's TSC ratio in the nested TSC scaling test,
so that reproducing a failure with a specific seed is slightly easier.
Link: https://patch.msgid.link/20260930173635.3362655-5-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Add coverage for KVM's virtualization of EFER_LMSLE_MBZ,
CPUID.80000008H:EBX[bit 20], which is set when the CPU does *not* support long
mode segment limits. Verify that KVM's enumeration of the defeature matches
the expectation derived from hardware plus kvm_amd's "nested" module param, so
that the assertion doesn't compare KVM's enumeration against itself, and that
WRMSR(EFER), nested VMRUN, and KVM_SET_SREGS reject EFER.LMSLE=1 if and only
if guest CPUID enumerates the defeature. Also verify that host-initiated
KVM_SET_MSRS is exempt from the check, as host-initiated writes skip guest
CPUID checks so that userspace can set MSRs before it sets guest CPUID.
Extend svm_nested_efer_test rather than add yet another test binary for a
single CPUID bit; the test already has the L1/L2 harness needed to exercise
EFER.LMSLE. Note, only a CPU that supports LMSLE, i.e. Rome and earlier,
exercises the emulation path; elsewhere KVM enumerates the defeature straight
from hardware.
Opportunistically drop the unnecessary #include of vmx.h.
Assisted-by: LLM
Signed-off-by: Jim Mattson <jmattson@google.com>
[sean: drop specific APM volume references, use common "nested" getter]
Link: https://patch.msgid.link/20260930212114.3500045-6-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
enabled
Add an API to check if the nested virtualization module param is enabled,
e.g. so that tests can verify KVM's own enumeration of the corresponding
CPU feature. Provide a big warning above the API to make it as obvious as
possible clear that tests should use "kvm_cpu_has(X86_FEATURE_VMX) ||
kvm_cpu_has(X86_FEATURE_SVM)" when checking for nested virtualization. It
doesn't really matter which method tests use, as KVM is supposed to keep
"nested" synchronized with VMX/SVM enumeration, but make the comment super
scary to try and prevent KVM selftests from having two different ways of
doing the same thing.
Note, the bool vs. int mess is intentional, because KVM's params are
terrible. kvm_amd.ko provides an "int", while kvm_intel.ko provides a
"bool".
Link: https://patch.msgid.link/20260930212114.3500045-5-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Rename svm_nested_clear_efer_svme.c to svm_nested_efer_test.c so that the
test can host coverage for other EFER bits whose behavior is tied to nested
SVM, and so that the name matches the svm_nested_<topic>_test convention used
by svm_nested_pat_test, svm_nested_shutdown_test, etc.
No functional change intended.
Assisted-by: LLM
Signed-off-by: Jim Mattson <jmattson@google.com>
Link: https://patch.msgid.link/20260930212114.3500045-4-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Delete guest_snprintf() as it isn't used, has never been used, and in all
likelihood will never be used. Because variadic functions can't pass along
va_args verbatim, guest_snprintf() can't be used as-is by things like
ucall_fmt(). guest_snprintf() could be used to dedup the ucall code by
turning it into a macro, but that would still require implicitly consuming
the caller's variadic arguments and would risk creating variable shadows,
i.e. introduces fragility for very little benefit.
No functional change intended.
Link: https://lore.kernel.org/all/20260930002238.649421F000FF@smtp.kernel.org
Signed-off-by: Gokul K <gokul02k@gmail.com>
Closes: https://lore.kernel.org/all/20260918113631.634233-4-gokul02k@gmail.com
Link: https://patch.msgid.link/20260918113631.634233-4-gokul02k@gmail.com
[sean: massage changelog]
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Add a set_id_regs case covering ID register immutability when a vCPU's
first KVM_RUN fails after finalization but before
KVM_ARCH_FLAG_HAS_RAN_ONCE is set. The test provokes such a failure with
a PMUv3-enabled vCPU whose PMU is left uninitialized, then checks that
KVM_SET_ONE_REG on the feature and implementation ID registers, and
KVM_CREATE_DEVICE for a vGIC, are all rejected with -EBUSY.
Assisted-by: LLM
[Fixed for latest tag standard -- broonie]
Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
Link: https://patch.msgid.link/20260805064740.3013538-1-fuad.tabba@linux.dev
Acked-by: Lorenzo Stoakes (ARM) <ljs@kernel.org>
Tested-by: Lorenzo Stoakes (ARM) <ljs@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Oliver Upton <oupton@kernel.org>
Link: https://patch.msgid.link/20260929-kvm-arm64-idreg-final-v4-3-75296dde994d@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
|
|
Userspace can hide a feature from a guest by clearing its field in a
writable ID register, and KVM then makes the feature's instructions
UNDEFINED in the guest by trapping or disabling them. No selftest checks
that.
Add a test that runs the instruction of each of TLBI OS, MOPS, TCR2_EL1
and FPMR once with its field as advertised and once with it cleared, and
expects an UNDEF only when cleared. A feature the vCPU doesn't advertise
is skipped, as is hidden TLBI OS on a CPU with neither FGT nor
FEAT_EVT2, where KVM can't trap it.
Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
Link: https://patch.msgid.link/20260929090031.3829185-5-fuad.tabba@linux.dev
Signed-off-by: Oliver Upton <oupton@kernel.org>
|
|
lib/io.c has outlived its purpose. test_read() has exactly one caller,
lib/elf.c; test_write() has none at all; and test_seq_read() is a
declaration in test_util.h with no definition anywhere in the tree.
Both surviving helpers open with
TEST_ASSERT(count >= 0, "Unexpected count, count: %li", count);
which can never fire, because @count is a size_t. Building with -Wextra
points this out:
lib/io.c:51:27: warning: comparison of unsigned expression in '>= 0'
is always true [-Wtype-limits]
lib/io.c:128:27: warning: comparison of unsigned expression in '>= 0'
is always true [-Wtype-limits]
The comment above each assertion is worse than the assertion itself: it
cites the read(2) and write(2) manpages to claim that a count of zero is
allowed, but a zero count lands in "case 0" and fails the test outright.
The helper has never accepted what the comment promises.
Move test_read() into elf.c as a static elf_read(), named for what it
does rather than reading as "test the read() syscall", and assert that
@count is non-zero, which is what the code has always required and what
every caller already passes. Drop the commentary describing retry
behaviour that the code makes obvious. Nothing is then left in
lib/io.c, so remove the file along with test_write() and the stale
test_seq_read() declaration.
No functional change intended.
Suggested-by: Sean Christopherson <seanjc@google.com>
Link: https://lore.kernel.org/all/aqxNbR9u5F1sqB3p@google.com
Signed-off-by: Gokul K <gokul02k@gmail.com>
Link: https://patch.msgid.link/20260918054420.338842-1-gokul02k@gmail.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
vcpu_set_cpuid_maxphyaddr() is declared in include/x86/processor.h and
defined nowhere. The declaration is the only mention of the name in
tools/testing/selftests, so nothing has ever been able to call it.
No Fixes: tag: a prototype for a function that does not exist cannot
have regressed anything, and there is nothing to backport.
No functional change intended.
Signed-off-by: Gokul K <gokul02k@gmail.com>
Link: https://patch.msgid.link/20260918113631.634233-3-gokul02k@gmail.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
|
|
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-ID: <20260813223610.2043560-7-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-ID: <20260813223610.2043560-6-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
Add a region_size field to struct vfio_pci_driver_ops so drivers can
declare how much DMA-mapped region they need. The mlx5 driver will need
~18MB for firmware pages. Existing drivers pass in the sizeof their state
struct. Since drivers all use only their declared state we can use the
value directly and remove the SZ_2M hard coding.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: David Matlack <dmatlack@google.com>
Link: https://lore.kernel.org/r/6-v7-c6d30e8ce1e4+3dfa6-mlx5st_jgg@nvidia.com
Signed-off-by: Alex Williamson <alex@shazbot.org>
|
|
These are needed by the VFIO mlx5 selftest in the following patches,
which includes some headers from mlx5 and also needs a few more
MMIO-related features.
- DECLARE_FLEX_ARRAY in new tools/include/linux/stddef.h (wraps
existing __DECLARE_FLEX_ARRAY from uapi/linux/stddef.h)
- dma_wmb/dma_rmb barriers: x86 uses compiler barrier
(DMA-coherent), arm64 uses dmb oshst/oshld (outer-shareable for
device visibility), generic fallback uses wmb/rmb
- ioread32be/iowrite32be in tools/include/asm-generic/io.h for
big-endian MMIO register access
Assisted-by: Claude:claude-opus-4.6
Reviewed-by: David Matlack <dmatlack@google.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/5-v7-c6d30e8ce1e4+3dfa6-mlx5st_jgg@nvidia.com
Signed-off-by: Alex Williamson <alex@shazbot.org>
|
