diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/phy/nvidia,tegra264-mphy.h | 12 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-qcom-qmp.h | 1 | ||||
| -rw-r--r-- | include/linux/phy/omap_control_phy.h | 2 | ||||
| -rw-r--r-- | include/linux/phy/phy-hdmi.h | 6 | ||||
| -rw-r--r-- | include/linux/phy/phy-thunderbolt.h | 14 | ||||
| -rw-r--r-- | include/linux/phy/phy.h | 2 |
6 files changed, 36 insertions, 1 deletions
diff --git a/include/dt-bindings/phy/nvidia,tegra264-mphy.h b/include/dt-bindings/phy/nvidia,tegra264-mphy.h new file mode 100644 index 000000000000..e9e253cdf9ae --- /dev/null +++ b/include/dt-bindings/phy/nvidia,tegra264-mphy.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +/* Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. */ + +#ifndef DT_BINDINGS_PHY_NVIDIA_TEGRA264_MPHY_H +#define DT_BINDINGS_PHY_NVIDIA_TEGRA264_MPHY_H + +#define TEGRA_MPHY_L0_TX 0 +#define TEGRA_MPHY_L0_RX 1 +#define TEGRA_MPHY_L1_TX 2 +#define TEGRA_MPHY_L1_RX 3 + +#endif /* DT_BINDINGS_PHY_NVIDIA_TEGRA264_MPHY_H */ diff --git a/include/dt-bindings/phy/phy-qcom-qmp.h b/include/dt-bindings/phy/phy-qcom-qmp.h index 6b43ea9e0051..1c3ce0c02b0c 100644 --- a/include/dt-bindings/phy/phy-qcom-qmp.h +++ b/include/dt-bindings/phy/phy-qcom-qmp.h @@ -16,6 +16,7 @@ /* QMP USB4-USB3-DP PHYs */ #define QMP_USB43DP_USB3_PHY 0 #define QMP_USB43DP_DP_PHY 1 +#define QMP_USB43DP_USB4_PHY 2 /* QMP PCIE PHYs */ #define QMP_PCIE_PIPE_CLK 0 diff --git a/include/linux/phy/omap_control_phy.h b/include/linux/phy/omap_control_phy.h index aec57dd784f7..5652aa2f4915 100644 --- a/include/linux/phy/omap_control_phy.h +++ b/include/linux/phy/omap_control_phy.h @@ -12,7 +12,7 @@ enum omap_control_phy_type { OMAP_CTRL_TYPE_OTGHS = 1, /* Mailbox OTGHS_CONTROL */ OMAP_CTRL_TYPE_USB2, /* USB2_PHY, power down in CONTROL_DEV_CONF */ - OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL & seperate Rx/Tx power */ + OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL & separate Rx/Tx power */ OMAP_CTRL_TYPE_PCIE, /* RX TX control of ACSPCIE */ OMAP_CTRL_TYPE_DRA7USB2, /* USB2 PHY, power and power_aux e.g. DRA7 */ OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */ diff --git a/include/linux/phy/phy-hdmi.h b/include/linux/phy/phy-hdmi.h index d4cf4430ee8f..1d4b62475079 100644 --- a/include/linux/phy/phy-hdmi.h +++ b/include/linux/phy/phy-hdmi.h @@ -19,6 +19,10 @@ enum phy_hdmi_mode { * @tmds_char_rate: HDMI TMDS Character Rate in Hertz. * @frl.rate_per_lane: HDMI FRL Rate per Lane in Gbps. * @frl.lanes: HDMI FRL lanes count. + * @frl.ffe_level: Transmitter Feed Forward Equalizer Level. + * Optional, only meaningful when set_ffe_level flag is on. + * @frl.set_ffe_level: Flag indicating whether or not to reconfigure ffe_level. + * All the other struct fields must be ignored when this is used. * * This structure is used to represent the configuration state of a HDMI phy. */ @@ -29,6 +33,8 @@ struct phy_configure_opts_hdmi { struct { u8 rate_per_lane; u8 lanes; + u8 ffe_level; + u8 set_ffe_level : 1; } frl; }; }; diff --git a/include/linux/phy/phy-thunderbolt.h b/include/linux/phy/phy-thunderbolt.h new file mode 100644 index 000000000000..5f48059814e1 --- /dev/null +++ b/include/linux/phy/phy-thunderbolt.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef __PHY_TBT_H_ +#define __PHY_TBT_H_ + +enum tbt_phy_submode { + PHY_SUBMODE_TBT3, + PHY_SUBMODE_USB4, +}; + +#endif diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index 14b924a88411..c480d6cb42c5 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -20,6 +20,7 @@ #include <linux/phy/phy-hdmi.h> #include <linux/phy/phy-lvds.h> #include <linux/phy/phy-mipi-dphy.h> +#include <linux/phy/phy-thunderbolt.h> struct phy; @@ -45,6 +46,7 @@ enum phy_mode { PHY_MODE_LVDS, PHY_MODE_DP, PHY_MODE_HDMI, + PHY_MODE_TBT, }; enum phy_media { |