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-rw-r--r--drivers/gpu/drm/xe/xe_hwmon.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 4b168d96ac64..97d298786073 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -110,6 +110,10 @@ enum sensor_attr_power {
/* Index of memory controller in READ_THERMAL_DATA output */
#define TEMP_INDEX_MCTRL 2
+/* On CRI the memory controller temperatures are READ_THERMAL_DATA bytes 16..19. */
+#define CRI_TEMP_INDEX_MCTRL 16
+#define CRI_TEMP_MCTRL_COUNT 4
+
/* Mailbox sentinel reported for an unavailable temperature sensor */
#define TEMP_MBX_INVALID 0xFF
@@ -1007,14 +1011,22 @@ static int mbx_temp_decode(u8 value)
static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
{
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
- int ret, i, count = 0;
+ int ret, i, start, end, count = 0;
s32 average = 0;
+ u32 data = 0;
guard(mutex)(&hwmon->hwmon_lock);
- for (i = 0; i < DIV_ROUND_UP(hwmon->temp.count, sizeof(u32)); i++) {
- u32 data = 0;
+ /* CRI relocated the memory controller temperatures to READ_THERMAL_DATA bytes 16..19. */
+ if (hwmon->xe->info.platform == XE_CRESCENTISLAND) {
+ start = CRI_TEMP_INDEX_MCTRL;
+ end = CRI_TEMP_INDEX_MCTRL + CRI_TEMP_MCTRL_COUNT;
+ } else {
+ start = TEMP_INDEX_MCTRL;
+ end = hwmon->temp.count - 1;
+ }
+ for (i = start / sizeof(u32); i < DIV_ROUND_UP(end, sizeof(u32)); i++) {
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
&data, NULL);
if (ret)
@@ -1023,7 +1035,7 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
hwmon->temp.dword[i] = cpu_to_le32(data);
}
- for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++) {
+ for (i = start; i < end; i++) {
if (!mbx_temp_valid(hwmon, hwmon->temp.value[i]))
continue;
average += mbx_temp_decode(hwmon->temp.value[i]);