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| author | Cheng Nie <niecheng1@uniontech.com> | 2026-06-29 07:48:10 -0700 |
|---|---|---|
| committer | Andrew Morton <akpm@linux-foundation.org> | 2026-07-22 21:11:45 -0700 |
| commit | 05c42e3de1bddb412a671177d4fed4fee7db8894 (patch) | |
| tree | 36b473c1b977c916c6a21e9e3cff480c8699aec7 /tools | |
| parent | 70a3fdc422f67c24e1d934a1cfae678b208233fd (diff) | |
| download | linux-next-05c42e3de1bddb412a671177d4fed4fee7db8894.tar.gz linux-next-05c42e3de1bddb412a671177d4fed4fee7db8894.zip | |
selftests/damon/_damon_sysfs.py: fix memcg_path assignment
Patch series "selftests/damon: fix memcg_path staging handling", v5.
Fix a bug in _damon_sysfs.py for damos_filter memcg_path setup, and add
a test case of it in sysfs.py.
This patch (of 2):
DamosFilter stores memcg_path for sysfs staging, but the constructor
assigns it with a trailing comma and therefore turns it into a tuple.
Fix the assignment so memcg_path is stored as the intended string. This
makes memcg filter staging and follow-up validation use the written path
correctly.
Link: https://lore.kernel.org/20260629144812.134159-1-sj@kernel.org
Link: https://lore.kernel.org/464AE12D4BC6B6F4+20260601090519.240482-1-niecheng1@uniontech.com
Link: https://lore.kernel.org/20260629144812.134159-2-sj@kernel.org
Signed-off-by: Cheng Nie <niecheng1@uniontech.com>
Signed-off-by: SJ Park <sj@kernel.org>
Reviewed-by: SJ Park <sj@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'tools')
| -rw-r--r-- | tools/testing/selftests/damon/_damon_sysfs.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/testing/selftests/damon/_damon_sysfs.py b/tools/testing/selftests/damon/_damon_sysfs.py index f6127081dfb2..c197ab99bcc0 100644 --- a/tools/testing/selftests/damon/_damon_sysfs.py +++ b/tools/testing/selftests/damon/_damon_sysfs.py @@ -271,7 +271,7 @@ class DamosFilter: self.type_ = type_ self.matching = matching self.allow = allow - self.memcg_path = memcg_path, + self.memcg_path = memcg_path self.addr_start = addr_start self.addr_end = addr_end self.target_idx = target_idx |