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| author | Devendra K Verma <devverma@amd.com> | 2026-09-07 15:42:12 +0530 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2026-09-15 21:46:06 +0530 |
| commit | 62fb4a3a59223abb4d7baa3e088169767a28d551 (patch) | |
| tree | e7a50779a9884e26509b502106ba33a90e8220ec /tools/perf/scripts/python | |
| parent | 5d5f4b3407d6ec86e76d094c332301135f493636 (diff) | |
| download | linux-next-62fb4a3a59223abb4d7baa3e088169767a28d551.tar.gz linux-next-62fb4a3a59223abb4d7baa3e088169767a28d551.zip | |
dmaengine: dw-edma: Enable Chan Separation via VSEC
As per, 'Designware Cores PCI Express DM Controller - Reference
Manual', section 3.2.34.3, VSEC for DEVICE INFORMATION supports
the channel separation mechanisms. Basically, the HDMA IP allows
the user to configure the separation between DMA channel
registers and retrieve it via the VSEC capability mentioned
above.
HDMA IP supports the channel register space separation from
256B to 32KB. Default supported size is 256B.
Signed-off-by: Devendra K Verma <devverma@amd.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260907101213.1917064-2-devverma@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions