diff options
| author | HyeongJun An <sammiee5311@gmail.com> | 2026-09-20 22:53:27 +0900 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-09-21 12:09:26 +0200 |
| commit | e31ae4aeb049983fe3be0cf1e12c8074811a7685 (patch) | |
| tree | edd63764de5e321d69ee249ecce493b6db61f11f /tools/perf/scripts/python/task-analyzer.py | |
| parent | d395e1b62d9694f2e4add9122f8d473eacd374aa (diff) | |
| download | linux-next-e31ae4aeb049983fe3be0cf1e12c8074811a7685.tar.gz linux-next-e31ae4aeb049983fe3be0cf1e12c8074811a7685.zip | |
ASoC: wm8903: Move the DRC QR threshold to the register that holds it
The DRC_THRESH_QR field is bits 7 and 6 of DRC_1, but the control sits on
DRC_0. Its shift and max are right for the field, only the register is
wrong.
Those bits of DRC_0 belong to DRC_STARTUP_GAIN, which "DRC Startup
Volume" claims as bits 10 to 6. So the two controls share bits 7 and 6.
Writing either one moves the other, and the quick release threshold is
never reached at all.
The six fields of DRC_1 tile it exactly, so there is nowhere else the
threshold could live. Point the control at DRC_1.
Found by a sweep for two controls claiming the same bits of one
register. No board with this codec was to hand, the register map is
the driver's own wm8903.h.
Fixes: f1c0a02f32f8 ("ALSA: ASoC: Add WM8903 CODEC driver")
Signed-off-by: HyeongJun An <sammiee5311@gmail.com>
Assisted-by: Claude:claude-opus-5
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://patch.msgid.link/20260920135327.3628704-1-sammiee5311@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions