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authorHeiko Schocher <hs@nabladev.com>2026-09-09 13:21:54 +0200
committerXu Yilun <yilun.xu@linux.intel.com>2026-09-19 01:08:52 +0800
commit4e3ca7189455e17295fc7c4966c18379dea786a1 (patch)
tree5e64b95c7bcd9981bafde29fa53fef53a515fb3a /tools/perf/scripts/python/stackcollapse.py
parenta0906012699dded6ca1525c30ba86738f90587a8 (diff)
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fpga: xilinx-selectmap: control CSI_B and RDWR_B during configuration
The driver requests the optional CSI_B and RDWR_B GPIOs with GPIOD_OUT_HIGH and never touches them again. That flag carries a logical value, so both signals end up asserted from probe on, whatever polarity the device tree states, and they stay asserted for the lifetime of the device. Neither signal belongs to the driver's lifetime. CSI_B (Chip Select) selects the device on the SelectMAP port, RDWR_B (Read/Write) selects the transfer direction, so both belong to the data transfer. A device that is never deselected never lets go of the port, and a port pinned to write mode cannot be read back. Keep the two descriptors in the driver private data, request them deasserted, and assert them only around the configuration data transfer. RDWR_B is asserted first, UG470 describes in chapter "SelectMAP ABORT" that changing it while the device is selected aborts the configuration on the next CCLK. Signed-off-by: Heiko Schocher <hs@nabladev.com> Reviewed-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20260909112200.13256-1-hs@nabladev.com Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
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