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authorPengpeng Hou <pengpeng@iscas.ac.cn>2026-06-23 21:53:49 +0800
committerVinod Koul <vkoul@kernel.org>2026-09-15 11:55:54 +0530
commit2ef1e78ef7223eb16d9cf20814a1b2873456f671 (patch)
tree0d2244bbbb9d64ea941e6f029c6cd8860ed43f7d /tools/perf/scripts/python/stackcollapse.py
parent21cddea2dd1f1b32f0800c119d98375533ca17e4 (diff)
downloadlinux-next-2ef1e78ef7223eb16d9cf20814a1b2873456f671.tar.gz
linux-next-2ef1e78ef7223eb16d9cf20814a1b2873456f671.zip
phy: samsung: usbdrd: propagate GS101 PIPE3 lock failures
The GS101 PIPE3 initialization checks the PMA PLL lock and then checks the CDR lock. The PLL helper returns an error, but the GS101 PIPE3 init path dropped that result. The CDR helper only logged a timeout. PHY initialization could therefore still return success after either the PLL or the selected receive lane had not locked. Make the in-file SoC-specific phy_init hook return an int so helpers with real failure results can propagate them through the existing PHY init paths. Keep the register-only helpers returning success and use the new return path to report the GS101 CDR wait failure. Other SoC helper paths keep their previous success behavior. Fixes: 32267c29bc7d ("phy: exynos5-usbdrd: support Exynos USBDRD 3.1 combo phy (HS & SS)") Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Link: https://patch.msgid.link/20260623135349.42739-1-pengpeng@iscas.ac.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
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