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authorRichard Cheng <icheng@nvidia.com>2026-09-14 17:08:58 +0800
committerDave Jiang <dave.jiang@intel.com>2026-09-15 08:35:58 -0700
commitfef22d37d47043b63e4007f2f5fe762fa21fae0c (patch)
tree7e31e5fbc2054c24a5f37fc83d7438ba39c27fde /tools/perf/scripts/python/parallel-perf.py
parent00f9ef9ad1cee60541ced2ec35f3c8182c4cb2ec (diff)
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tools/testing/cxl: Enable zero sized decoders under hb0
The kernel now allows committed zero-size HDM decoders so BIOS can lock empty decoders; cxl_test needs to exercise that path. Add a mock_zero_size_decoders module parameter (default off). When set, the special endpoints under host-bridge0 (cxl_mem.0 and cxl_mem.4) commit decoders 1 and 2 as zero-size + locked above the decoder[0] auto-region, mirrored on the parent switch and host bridge. The mocks take a real zero-size DPA reservation, like enumeration of real hardware, so commit_end lands on a zero-size decoder and the reservation, poison-by-endpoint, and teardown paths all run. Signed-off-by: Vishal Aslot <vaslot@nvidia.com> Signed-off-by: Richard Cheng <icheng@nvidia.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com> Link: https://patch.msgid.link/20260914090858.19181-4-icheng@nvidia.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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