pinctrl: airoha: add support of en7528 SoC

The EcoNet EN7528 MIPS SoC uses the same pin controller and GPIO IP as
the Airoha SoCs, so it can reuse the shared driver code. Its register
layout differs from every existing variant though: all IOMUX mode bits
live in a single CHIP SCU register (RG_PON_I2C_MODE at 0x15c) plus the
spill-over bits in IOMUX Control 3 (0x224), EJTAG has its own enable
register at 0x1ac, the LED mapping registers sit at 0x1b0/0x1b4 and all
pin configuration registers are at different offsets than on EN7523.

Pin numbering follows the GPIO line numbering, so pins 0-41 map to
GPIO0-GPIO41. Pins 42-49 are the standalone I2C/UART/SPI pads, which
have no GPIO function and are only referenced by the pinconf tables.

Only GPIO0-GPIO15 are wired to the interrupt controller, so num_irq_pins
is 16. EN7528 has no PCIe reset open drain register, so
AIROHA_PINCTRL_CONFS_PCIE_RST_OD is left empty and
PIN_CONFIG_DRIVE_OPEN_DRAIN is rejected for all pins.

Signed-off-by: Benjamin Larsson <benjamin.larsson@genexis.eu>
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>

0 files changed, 0 insertions, 0 deletions