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| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2026-09-04 15:54:21 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-09-07 11:04:18 +0200 |
| commit | 342a7ce6d2f7b13037f0f993ca760779c53834d9 (patch) | |
| tree | d3b5c353db5f1bc8b272dea1679343a6c9a97c4a /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 11e4c9251295b4513a244cb73bc902b5f6a34f8e (diff) | |
| download | linux-next-342a7ce6d2f7b13037f0f993ca760779c53834d9.tar.gz linux-next-342a7ce6d2f7b13037f0f993ca760779c53834d9.zip | |
pinctrl: renesas: rzg2l: Generalize power source code
The current functions used to get/set the pin power source check the
OTHER_POC register, which is specific to the RZ/G3L SoC only. To allow
the code to be extended for other power source functionalities (e.g. I3C
on RZ/G3S), generalize the functions used to get/set the pin power
source.
For this, introduce the struct rzg2l_register_masks data structure whose
purpose is to store SoC specific register bit masks. The members of
this structure are then used in rzg2l_caps_to_pwr_reg() to retrieve the
bitmask corresponding to a SoC specific power source capability.
The conversion between HW specific power source values and SW specific
power source values is now handled through rzg2l_pwr_reg_val_to_ps() and
rzg2l_ps_to_pwr_reg_val().
Finally, to keep the code generic, the register update in
rzg2l_set_power_source() was changed to a read-modify-write approach to
cover all cases.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://patch.msgid.link/20260904125425.412632-2-claudiu.beznea+renesas@tuxon.dev
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
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