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authorJoe Lawrence <joe.lawrence@redhat.com>2026-09-16 11:43:04 -0700
committerIngo Molnar <mingo@kernel.org>2026-09-21 11:01:56 +0200
commit913bf39ff461bc65cfc4e1e05c3d738ffc6ffc75 (patch)
tree015e0a2ae0ad03eed674e24c9ef3c43376d68eb7 /tools/objtool/Makefile
parent9b11acaad1a63eddf4a9bf50dc9b90183bf037e1 (diff)
downloadlinux-next-913bf39ff461bc65cfc4e1e05c3d738ffc6ffc75.tar.gz
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objtool: Forward toolchain variables to the klp test runner
The tests target already passes ARCH and CROSS_COMPILE into run-tests.sh. lib.sh uses those to pick a default compiler and binutils: CC=${CC:-${CROSS_COMPILE}gcc} LD=${LD:-${CROSS_COMPILE}ld} READELF=${READELF:-${CROSS_COMPILE}readelf} OBJCOPY=${OBJCOPY:-${CROSS_COMPILE}objcopy} Those defaults only apply when the variables reach the shell that sources lib.sh. The recipe passed OBJTOOL, ARCH and CROSS_COMPILE explicitly, but not CC or the binutils. Makefile-assigned values (e.g. from LLVM=1) are not visible in the recipe environment unless forwarded: $ LLVM=1 make -C tools/objtool tests ... # preflight # compiler gcc (GCC) ... Pass CC, LD, READELF and OBJCOPY the same way as ARCH and CROSS_COMPILE, so fixtures are built and inspected with the toolchain make selected: $ LLVM=1 make -C tools/objtool tests ... # preflight # compiler clang version 21.1.8 ... Signed-off-by: Joe Lawrence <joe.lawrence@redhat.com> Signed-off-by: Song Liu <song@kernel.org> Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Assisted-by: Claude:claude-opus-5 Link: https://patch.msgid.link/20260916184351.2720310-12-song@kernel.org
Diffstat (limited to 'tools/objtool/Makefile')
-rw-r--r--tools/objtool/Makefile9
1 files changed, 9 insertions, 0 deletions
diff --git a/tools/objtool/Makefile b/tools/objtool/Makefile
index d3db9663ae1b..db99c4759b2c 100644
--- a/tools/objtool/Makefile
+++ b/tools/objtool/Makefile
@@ -153,8 +153,17 @@ clean: $(LIBSUBCMD)-clean
mrproper: clean
$(call QUIET_CLEAN, objtool) $(RM) $(OBJTOOL)
+# The kernel's own Makefile sets OBJCOPY, to llvm-objcopy under LLVM and to
+# $(CROSS_COMPILE)objcopy otherwise; tools/scripts/Makefile.include names only
+# LLVM_OBJCOPY and leaves OBJCOPY unset. Forwarding it unset would hand the
+# tests an empty string, and they would fall back to GNU objcopy even when
+# asked for an LLVM toolchain.
+OBJCOPY ?= $(if $(LLVM),$(LLVM_OBJCOPY),$(CROSS_COMPILE)objcopy)
+
tests: $(OBJTOOL)
$(Q)OBJTOOL=$(abspath $(OBJTOOL)) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) \
+ CC='$(CC) $(CLANG_CROSS_FLAGS)' LD='$(LD)' \
+ READELF='$(READELF)' OBJCOPY='$(OBJCOPY)' \
KEEP=$(KEEP) $(srctree)/tools/objtool/tests/run-tests.sh
FORCE: